Patents by Inventor Naoto Kimura

Naoto Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6779702
    Abstract: In a wire bonding apparatus including a horn driver for generating ultrasonic waves, a capillary, an ultrasonic horn formed by a symmetrical section fixed to the horn driver and an asymmetrical section having an end for mounting the capillary, the asymmetrical section is constructed by a spurious vibration suppressing structure for suppressing a vibration component of the ultrasonic horn perpendicular to a propagation direction of the ultrasonic waves with the ultrasonic horn.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: August 24, 2004
    Assignee: NEC Electronics Corporation
    Inventors: Naoto Kimura, Hidemi Matsukuma
  • Patent number: 6744141
    Abstract: In a semiconductor device including a substrate, a first semiconductor chip directly or indirectly on the substrate, and a second semiconductor chip located on the first semiconductor chip, the second semiconductor chip has a larger dimension than that of the first semiconductor chip.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: June 1, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Publication number: 20040099944
    Abstract: A package is formed by mounting a plurality of semiconductor chips 6 and 7 on a substrate 1, arranging a heat spreader 13 on a resin surface opposite to a surface where pads 8 for the semiconductor chips are formed, via a curved intermediate plate 11 made of a metal, and filling with resin 14. The curved intermediate plate 11 is formed so as to easily bend in order to compensate the semiconductor chips 6 and 7 for the height difference relative to the heat spreader 13, and has a plurality of bumps 12 on the surface thereof in order to allow contact with the semiconductor chips by multipoint.
    Type: Application
    Filed: October 16, 2003
    Publication date: May 27, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Publication number: 20040099933
    Abstract: A resin-sealed type semiconductor device has a mount stage, a semiconductor chip mounted on the stage such that a rear surface of the chip is in contact with the stage, a heat spreader associated with the stage and the chip, and a molded resin package encapsulating the stage, chip, and heat spreader. The stage is configured such that the rear surface of the chip is partially covered with the stage, whereby uncovered areas are defined on the rear surface of the electronic component. The heat spreader is complementarily configured with respect to the stage so as to be in direct contact with the uncovered areas of the rear surface of the electronic component, whereby an entire thickness of both the mount stage and the heat spreader is smaller than a total of a thickness of the mount stage and a thickness of the heat spreader.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 27, 2004
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Naoto Kimura
  • Patent number: 6734553
    Abstract: The semiconductor device according to the present invention is equipped with a plurality of electronic circuits including at least one semiconductor integrated circuit chip, and a plurality of intermediate substrates interposed between the electronic components and a package and mounting the electronic components directly on its one major face, where each of the electronic component has on the one major face at least a plurality of first electrodes connected to the electronic components, a plurality of second electrodes for external connection, and internal connection electrodes for connecting between the electronic components including the connection between the first electrodes and the second electrodes that are mutually corresponding.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: May 11, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Publication number: 20040080041
    Abstract: A semiconductor device for an improved heatsink structure. The semiconductor device is composed of a first substrate, a first heatsink plate connected to the first substrate, a second substrate having a rear surfaces connected to the first heatsink plate, a semiconductor chip having a main surface bonded to a main surface of the second substrate, and a second heatsink plate connected to a rear surface of the semiconductor chip.
    Type: Application
    Filed: October 17, 2003
    Publication date: April 29, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Patent number: 6690090
    Abstract: A downsized semiconductor device comprises a plurality of bonding pads formed on a surface of a semiconductor chip. A plurality of conductive wires are coupled to the bonding pad and extends away from the surface of the semiconductor chip. The surface of the semiconductor chip and the periphery of the plurality of conductive wires are covered with a resin layer. Each of the conductive wires and the resin layer covering the periphery of the conductive wire forms a coaxial body. A plurality of solder balls are mounted on the top end portion of the coaxial bodies and are electrically coupled with the conductive wires. Reinforcement resin portions are provided each of which is attached to an area from an upper end portion of the coaxial body to the solder ball to reinforce the coupling of the solder ball with the coaxial body.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: February 10, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Patent number: 6640436
    Abstract: A method for fabricating a semiconductor device includes removing a predetermined part of an insulative layer of a coated fine metallic wire by irradiating the predetermined part with a laser light and connecting the predetermined part of the fine metallic wire to one of the semiconductor device and a package of the semiconductor device. The insulative layer contains a substance that absorbs the laser light at a predetermined lasing wavelength.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: November 4, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Naoto Kimura, Takahiro Ito
  • Patent number: 6621156
    Abstract: A semiconductor device in which a plurality of semiconductor chips are stacked. The semiconductor device includes a lower semiconductor chip bonded onto a surface of a wiring substrate; an upper semiconductor chip; and one or more spacers which are bonded to the surface of the wiring substrate and which support the upper chip over the lower chip and at a location separated from the lower chip. Conductors electrically connect the lower chip to the wiring substrate and extend through the spacers.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: September 16, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Publication number: 20030151139
    Abstract: In a semiconductor device including a metal substrate having one surface on which a semiconductor chip is mounted and the other surface on which solder balls are mounted, the semiconductor chip is electrically connected to the solder balls through through-holes formed in the substrate and bonding wires. An insulating film is formed on a whole surface of the substrate including inner surface of the through-holes and the solder balls are supported by the through-holes, so that a wiring connected to the electrically conductive through-holes and the semiconductor chip are electrically connected by the bonding wires. Diameter of the through-hole in the other surface of the substrate on which the solder ball is supported is larger than diameter of the through-hole in the one surface of the substrate.
    Type: Application
    Filed: January 28, 2003
    Publication date: August 14, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Naoto Kimura
  • Patent number: 6605869
    Abstract: The present invention provides a semiconductor device comprising: a tape wiring substrate; a semiconductor element mounted one main surface of the tape wiring substrate; a solder ball or pump electrode provided on the other surface of the tape wiring substrate while electrically connected with a predetermined position of the main surface of the tape wiring substrate including the semiconductor element; and a hollow pipe-shaped substrate; wherein the tape wiring substrate is wound around the hollow pipe-shaped substrate with the main surface arranged toward the hollow pipe-shaped substrate.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: August 12, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Patent number: 6600221
    Abstract: The present invention provides a semiconductor device having a substrate on which a plurality of semiconductor chips are stacked, wherein the semiconductor device comprising; a first semiconductor chip mounted on the substrate, a plurality of second semiconductor chips size of which are larger than that of the first semiconductor chip and stacked on the first semiconductor chip with a size-increasing order, a bonding pad formed on the semiconductor chip, a circuit pattern formed on the substrate, a bonding wire for connecting the bonding pad formed on the semiconductor chip and the circuit pattern formed on the substrate, a through hole, formed on the substrate, through which the bonding wire is to be inserted, and further wherein the bonding wire is wired so as to be substantially perpendicularly to a surface of the semiconductor chip.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: July 29, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Kimura
  • Publication number: 20030106923
    Abstract: In a wire bonding apparatus including a horn driver for generating ultrasonic waves, a capillary, an ultrasonic horn formed by a symmetrical section fixed to the horn driver and an asymmetrical section having an end for mounting the capillary, the asymmetrical section is constructed by a spurious vibration releasing structure for releasing a vibration component of the ultrasonic horn perpendicular to a propagation direction of the ultrasonic waves with the ultrasonic horn.
    Type: Application
    Filed: January 24, 2003
    Publication date: June 12, 2003
    Inventors: Naoto Kimura, Hidemi Matsukuma
  • Patent number: 6575348
    Abstract: In a wire bonding apparatus including a horn driver for generating ultrasonic waves, a capillary, an ultrasonic horn formed by a symmetrical section fixed to the horn driver and an asymmetrical section having an end for mounting the capillary, the asymmetrical section is constructed by a spurious vibration suppressing structure for suppressing a vibration component of the ultrasonic horn perpendicular to a propagation direction of the ultrasonic waves with the ultrasonic horn.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: June 10, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Naoto Kimura, Hidemi Matsukuma
  • Publication number: 20030011067
    Abstract: In a semiconductor device including a substrate, a first semiconductor chip directly or indirectly on the substrate, and a second semiconductor chip located on the first semiconductor chip, the second semiconductor chip has a larger dimension than that of the first semiconductor chip.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 16, 2003
    Inventor: Naoto Kimura
  • Publication number: 20020185518
    Abstract: In a wire bonding apparatus including a horn driver for generating ultrasonic waves, a capillary, an ultrasonic horn formed by a symmetrical section fixed to the horn driver and an asymmetrical section having an end for mounting the capillary, the asymmetrical section is constructed by a spurious vibration releasing structure for releasing a vibration component of the ultrasonic horn perpendicular to a propagation direction of the ultrasonic waves with the ultrasonic horn.
    Type: Application
    Filed: June 6, 2002
    Publication date: December 12, 2002
    Inventors: Naoto Kimura, Hidemi Matsukuma
  • Publication number: 20020175421
    Abstract: The semiconductor device according to the present invention is equipped with a plurality of electronic circuits including at least one semiconductor integrated circuit chip, and a plurality of intermediate substrates interposed between the electronic components and a package and mounting the electronic components directly on its one major face, where each of the electronic component has on the one major face at least a plurality of first electrodes connected to the electronic components, a plurality of second electrodes for external connection, and internal connection electrodes for connecting between the electronic components including the connection between the first electrodes and the second electrodes that are mutually corresponding.
    Type: Application
    Filed: May 20, 2002
    Publication date: November 28, 2002
    Inventor: Naoto Kimura
  • Patent number: 6476500
    Abstract: A first semiconductor chip is mounted on a printed circuit board and a second semiconductor chip is mounted on said first semiconductor chip. The second semiconductor chip is displaced in a special direction from the center of the first semiconductor chip. This obviates the need for relay terminals on the side of the first semiconductor chip toward which the second semiconductor chip has been displaced. This allows the first semiconductor chip to be reduced in size by the area that would otherwise be occupied by the relay terminals, and thereby reduces the size of the semiconductor device.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: November 5, 2002
    Assignee: NEC Corporation
    Inventor: Naoto Kimura
  • Patent number: 6472759
    Abstract: A BGA type semiconductor device having a high reliability when mounted on a printed circuit board by preventing cracks and breakage of weld balls of the BGA type semiconductor device. The semiconductor device includes a conductive board having a pair of terminals, a relay terminal and an external terminal, arranged at a distance from each other and on different surfaces of the conductive board. The relay terminal serves as a connection terminal formed on a wiring board. Moreover, a slit 7 is provided around the terminals provided on the conductive board.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: October 29, 2002
    Assignee: NEC Corporation
    Inventor: Naoto Kimura
  • Publication number: 20020140084
    Abstract: The present invention provides a semiconductor device comprising: a tape wiring substrate; a semiconductor element mounted one main surface of the tape wiring substrate; a solder ball or pump electrode provided on the other surface of the tape wiring substrate while electrically connected with a predetermined position of the main surface of the tape wiring substrate including the semiconductor element; and a hollow pipe-shaped substrate; wherein the tape wiring substrate is wound around the hollow pipe-shaped substrate with the main surface arranged toward the hollow pipe-shaped substrate.
    Type: Application
    Filed: April 3, 2002
    Publication date: October 3, 2002
    Inventor: Naoto Kimura