Patents by Inventor Natan Manevich
Natan Manevich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230269684Abstract: A network adapter comprises an output that couples to a central processing unit (CPU) of a network device, a first clock coupled to the output and configured to be synchronized with a second clock that is external to the CPU and the network adapter, and circuitry coupled to the first clock. The circuitry is configured to generate, using the synchronized first clock, a tick at a time offset from a timeslot of a radio schedule for a radio unit and send the tick to the output.Type: ApplicationFiled: February 18, 2022Publication date: August 24, 2023Inventors: Wojciech Wasko, Dotan David Levi, Natan Manevich, Timothy James Martin
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Publication number: 20230251899Abstract: In one embodiment, a system includes a peripheral device including a hardware clock, and processing circuitry to read a given work request entry stored with a plurality of work request entries in at least one work queue in a memory, the given work request entry including timing data and an operator, the timing data being indicative of a time at which a work request should be executed, retrieve a clock value from the hardware clock, and execute the work request with a workload while execution of the work request is timed responsively to the timing data and the operator and the retrieved clock value.Type: ApplicationFiled: February 9, 2022Publication date: August 10, 2023Inventors: Dotan David Levi, Daniel Marcovitch, Natan Manevich, Wojciech Wasko, Igor Voks
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Publication number: 20230236624Abstract: In one embodiment, a device includes a hardware clock to maintain a clock value, a hardware counter to maintain an estimation of a dynamic error bound of the clock value, and a clock controller to intermittently discipline the hardware clock responsively to a remote clock, advance the hardware counter at a rate responsively to a clock drift, and adjust the hardware counter responsively to the hardware clock being disciplined.Type: ApplicationFiled: January 24, 2022Publication date: July 27, 2023Inventors: Dotan David Levi, Wojciech Wasko, Eitan Zahavi, Natan Manevich, Bar Shapira
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Patent number: 11711158Abstract: A network device includes a port, a transmission pipeline and a time-stamping circuit. The port is configured for connecting to a network. The transmission pipeline includes multiple pipeline stages and is configured to process packets and to send the packets to the network via the port. The time-stamping circuit is configured to temporarily suspend at least some processing of at least a given packet in the transmission pipeline, to verify whether a pipeline stage having a variable processing delay, located downstream from the time-stamping circuit, meets an emptiness condition, and, only when the pipeline stage meets the emptiness condition, to time-stamp the given packet and resume the processing of the given packet.Type: GrantFiled: June 28, 2021Date of Patent: July 25, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Wojciech Wasko, Natan Manevich, Hillel Chapman, Roi Geuli, Eyal Serbro
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Publication number: 20230231695Abstract: In one embodiment, a synchronized communication system includes a plurality of compute nodes, and clock connections to connect the compute nodes in a closed loop configuration, wherein the compute nodes are configured to distribute among the compute nodes a master clock frequency from any selected one of the compute nodes.Type: ApplicationFiled: January 20, 2022Publication date: July 20, 2023Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Publication number: 20230229188Abstract: A system is disclosed that includes two or more network elements, each comprising a Precision Time Protocol (PTP) Hardware Clock (PHC) that is adjustable based, at least in part, on physical layer frequency information.Type: ApplicationFiled: January 18, 2022Publication date: July 20, 2023Inventors: Bar Shapira, Ariel Almog, Dotan David Levi, Natan Manevich, Thomas Kernen
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Patent number: 11706014Abstract: In one embodiment, a synchronized communication system includes a plurality of compute nodes, and clock connections to connect the compute nodes in a closed loop configuration, wherein the compute nodes are configured to distribute among the compute nodes a master clock frequency from any selected one of the compute nodes.Type: GrantFiled: January 20, 2022Date of Patent: July 18, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Publication number: 20230185600Abstract: In one embodiment, a system includes a memory, a processing device including a device processor; and a device clock, and a peripheral device including an interface to share data with the processing device, a hardware clock, and processing circuitry to write respective interrupt signaling messages to the memory responsively to respective hardware clock values of the hardware clock, and wherein the device processor is configured, responsively to the respective interrupt signaling messages being written to the memory, to perform a time-dependent action.Type: ApplicationFiled: December 14, 2021Publication date: June 15, 2023Inventors: Wojciech Wasko, Dotan David Levi, Liron Mula, Natan Manevich
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Patent number: 11641245Abstract: In one embodiment, an event processing system includes a clock configured to provide time values, and event processing circuitry, which is configured to generate a confidence level indicative of a degree of confidence of an accuracy of a timestamp, the timestamp being generated for an event responsively to a time value indicative of when an operation associated with the event occurred.Type: GrantFiled: May 3, 2021Date of Patent: May 2, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Wojciech Wasko, Natan Manevich, Roee Moyal, Eliel Peretz, Eran Ben Elisha, Ariel Almog, Teferet Geula, Amit Mandelbaum
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Patent number: 11606427Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.Type: GrantFiled: December 14, 2020Date of Patent: March 14, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Avraham Ganor, Arnon Sattinger, Natan Manevich, Reuven Kogan, Artiom Tsur, Ariel Almog, Bar Shapira
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Publication number: 20220416925Abstract: A network device includes a port, a transmission pipeline and a time-stamping circuit. The port is configured for connecting to a network. The transmission pipeline includes multiple pipeline stages and is configured to process packets and to send the packets to the network via the port. The time-stamping circuit is configured to temporarily suspend at least some processing of at least a given packet in the transmission pipeline, to verify whether a pipeline stage having a variable processing delay, located downstream from the time-stamping circuit, meets an emptiness condition, and, only when the pipeline stage meets the emptiness condition, to time-stamp the given packet and resume the processing of the given packet.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Inventors: Dotan David Levi, Wojciech Wasko, Natan Manevich, Hillel Chapman, Roi Geuli, Eyal Serbro
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Publication number: 20220357763Abstract: A network adapter includes a network port for communicating with a communication network, a hardware clock, and circuitry. The circuitry is coupled to receive from the communication network, via the network port, one or more time-protocol packets that convey a network time used for synchronizing network devices in the communication network, to align the hardware clock to the network time conveyed in the time-protocol packets, and to make the network time available to one or more time-service consumers running in a host served by the network adapter.Type: ApplicationFiled: May 6, 2021Publication date: November 10, 2022Inventors: Itai Levy, Dotan David Levi, Nir Nitzani, Natan Manevich, Alex Vaynman, Ariel Almog
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Publication number: 20220360423Abstract: In one embodiment, a processing apparatus includes processing circuitry to process an event, a timestamping unit to generate a timestamp for the event, at least one register to store at least one parameter describing a hardware state of the processing circuitry, and timestamp correction processing circuitry to compute a time value as a correction to the generated timestamp responsively to the at least one parameter.Type: ApplicationFiled: May 10, 2021Publication date: November 10, 2022Inventors: Dotan David Levi, Wojciech Wasko, Natan Manevich, Teferet Geula, Amit Mandelbaum, Ariel Almog
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Publication number: 20220352998Abstract: In one embodiment, an event processing system includes a clock configured to provide time values, and event processing circuitry, which is configured to generate a confidence level indicative of a degree of confidence of an accuracy of a timestamp, the timestamp being generated for an event responsively to a time value indicative of when an operation associated with the event occurred.Type: ApplicationFiled: May 3, 2021Publication date: November 3, 2022Inventors: Dotan David Levi, Wojciech Wasko, Natan Manevich, Roee Moyal, Eliel Peretz, Eran Ben Elisha, Ariel Almog, Teferet Geula, Amit Mandelbaum
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Publication number: 20220191275Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.Type: ApplicationFiled: December 14, 2020Publication date: June 16, 2022Inventors: Dotan David Levi, Avraham Ganor, Arnon Sattinger, Natan Manevich, Reuven Kogan, Artiom Tsur, Ariel Almog, Bar Shapira
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Patent number: 11277455Abstract: A method including configuring a transmit process to store information including a queue of packets to be transmitted, the queue defining transmit process packets to be transmitted, each packet associated with a transmission time, and configuring a synchronization process to receive from the transmit process at least some of the information. The synchronization process performs one of: A) accessing a dummy send queue and a completion queue, and transmitting one or more of the transmit process packets in accordance with a completion queue entry in the completion queue, and B) sends a doorbell to transmission hardware at a time when at least one of the transmit process packets is to be transmitted, the synchronization process including a master queue configured to store transmission entries, each transmission entry including a transmit process indicator and an indication of transmit process packets to be transmitted. Related apparatus and methods are also described.Type: GrantFiled: June 4, 2019Date of Patent: March 15, 2022Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Alex Vainman, Natan Manevich, Nir Nitzani, Ilan Smith, Richard Hastie, Noam Bloch, Lior Narkis, Rafi Weiner
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Publication number: 20220006606Abstract: A timing system including timing circuitry which includes an arming queue, a clock work queue, and a clock completion queue. At least the clock work queue is to provide timing information, and the arming queue is to arm the clock work queue. Related apparatus and methods are also provided.Type: ApplicationFiled: June 1, 2021Publication date: January 6, 2022Inventors: Dotan David Levi, Ariel Shahar, Shahaf Shuler, Ariel Almog, Eitan Hirshberg, Natan Manevich
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Publication number: 20190379714Abstract: A method including configuring a transmit process to store information including a queue of packets to be transmitted, the queue defining transmit process packets to be transmitted, each packet associated with a transmission time, and configuring a synchronization process to receive from the transmit process at least some of the information. The synchronization process performs one of: A) accessing a dummy send queue and a completion queue, and transmitting one or more of the transmit process packets in accordance with a completion queue entry in the completion queue, and B) sends a doorbell to transmission hardware at a time when at least one of the transmit process packets is to be transmitted, the synchronization process including a master queue configured to store transmission entries, each transmission entry including a transmit process indicator and an indication of transmit process packets to be transmitted. Related apparatus and methods are also described.Type: ApplicationFiled: June 4, 2019Publication date: December 12, 2019Inventors: Dotan David Levi, Alex Vainman, Natan Manevich, Nir Nitzani, Ilan Smith, Richard Hastie, Noam Bloch, Lior Narkis, Rafi Weiner