Patents by Inventor Nayak Ratnakar Aravind

Nayak Ratnakar Aravind has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170288915
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for clock recovery in a data receiver.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Inventors: Nayak Ratnakar Aravind, Mohammad Mobin, Thomas Gibbons
  • Patent number: 9734860
    Abstract: Systems and methods are disclosed relating generally to data processing, and more particularly to applying low pass and rotation filtering in relation to data processing. For example, a system may include a phase modification value determination circuit operable to generate a phase offset value based upon an input data set derived from information sensed from a storage medium. The system may include an integrated low pass and rotation filtering circuit operable to simultaneously apply a low pass filtering function and phase rotation function to a series of digital samples derived from the information sensed from the storage medium to yield a modified output. Application of both the low pass filtering and phase rotation functions is governed at least in part based upon a selected coefficient set corresponding to a combination of the phase off set value and a boost value.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: August 15, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Haitao Xia, Nayak Ratnakar Aravind, Lu Pan, Sr., Haotian Zhang
  • Publication number: 20170201396
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for back channel control in a serial data transfer.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 13, 2017
    Inventors: Mohammad Mobin, Haitao Xia, Nayak Ratnakar Aravind
  • Publication number: 20170084306
    Abstract: Systems and methods are disclosed relating generally to data processing, and more particularly to applying low pass and rotation filtering in relation to data processing. For example, a system may include a phase modification value determination circuit operable to generate a phase offset value based upon an input data set derived from information sensed from a storage medium. The system may include an integrated low pass and rotation filtering circuit operable to simultaneously apply a low pass filtering function and phase rotation function to a series of digital samples derived from the information sensed from the storage medium to yield a modified output. Application of both the low pass filtering and phase rotation functions is governed at least in part based upon a selected coefficient set corresponding to a combination of the phase off set value and a boost value.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 23, 2017
    Inventors: Haitao Xia, Nayak Ratnakar Aravind, Lu Pan, SR., Haotian Zhang
  • Publication number: 20170033952
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for clock recovery in a data receiver.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 2, 2017
    Inventors: Nayak Ratnakar Aravind, Mohammad Mobin
  • Publication number: 20160350463
    Abstract: A method of modeling an electronic circuit includes creating a model of the electronic circuit having at least one functional block with a linear sub-block and a non-linear sub-block, partitioning the linear sub-block into multiple partial input range linear sub-blocks, each adapted to primarily process a different range of input values, generating model parameters for each of the partial input range linear sub-blocks, simulating the electronic circuit based at least in part on the model parameters, and fabricating the electronic circuit.
    Type: Application
    Filed: May 31, 2015
    Publication date: December 1, 2016
    Inventors: Nayak Ratnakar Aravind, Bruce A. Wilson
  • Patent number: 9431051
    Abstract: Systems and methods relating generally to data processing, and more particularly to adjusting gain parameters in relation to data processing.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: August 30, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Haitao Xia, Nayak Ratnakar Aravind, Lu Pan, Sr., Haotian Zhang
  • Patent number: 9224421
    Abstract: Systems and methods for magnetoresistive asymmetry estimation may include, but are not limited to, operations for: receiving a magnetic read head transducer output; computing a mean value of the magnetic read head transducer output; computing a median value of the magnetic read head transducer output; and applying a correction coefficient to a magnetic read head detector input according to at least the mean value of the magnetic read head transducer output and the median value of the magnetic read head transducer output.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: December 29, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Bruce A. Wilson, Nayak Ratnakar Aravind, Haitao Xia
  • Publication number: 20150255109
    Abstract: Systems and methods for magnetoresistive asymmetry estimation may include, but are not limited to, operations for: receiving a magnetic read head transducer output; computing a mean value of the magnetic read head transducer output; computing a median value of the magnetic read head transducer output; and applying a correction coefficient to a magnetic read head detector input according to at least the mean value of the magnetic read head transducer output and the median value of the magnetic read head transducer output.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Applicant: LSI Corporation
    Inventors: Bruce A. Wilson, Nayak Ratnakar Aravind, Haitao Xia
  • Patent number: 9129646
    Abstract: A magnetic recording system includes an array of analog inputs operable to receive an array of analog signals retrieved from a magnetic storage medium, where one of the array of analog signals corresponds with a reference channel, a timing recovery circuit operable to generate a clock signal based on the analog signal for the reference channel, a number of analog to digital converters each operable to sample one of the array of analog signals based on the clock signal to yield a number of digital channels, and a joint equalizer operable to filter the digital channels to yield an equalized output.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: September 8, 2015
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: George Mathew, Nayak Ratnakar Aravind, Suharli Tedja
  • Publication number: 20150070796
    Abstract: A magnetic recording system includes an array of analog inputs operable to receive an array of analog signals retrieved from a magnetic storage medium, where one of the array of analog signals corresponds with a reference channel, a timing recovery circuit operable to generate a clock signal based on the analog signal for the reference channel, a number of analog to digital converters each operable to sample one of the array of analog signals based on the clock signal to yield a number of digital channels, and a joint equalizer operable to filter the digital channels to yield an equalized output.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 12, 2015
    Applicant: LSI Corporation
    Inventors: George Mathew, Nayak Ratnakar Aravind, Suharli Tedja
  • Patent number: 8976471
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for tone reduction in relation to data transmission. In one case, a data processing system is disclosed that includes: a two stage tone reduction circuit including a first stage circuit and a second stage circuit; and a polarity change circuit operable to change a polarity of the second stage output to yield a tone reduction output.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: March 10, 2015
    Assignee: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Bruce A. Wilson, Lu Pan, Haitao Xia
  • Publication number: 20150062732
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for tone reduction in relation to data transmission.
    Type: Application
    Filed: September 12, 2013
    Publication date: March 5, 2015
    Applicant: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Bruce A. Wilson, Lu Pan, Haitao Xia
  • Patent number: 8949701
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: February 3, 2015
    Assignee: Agere Systems Inc.
    Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
  • Patent number: 8904070
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: December 2, 2014
    Assignee: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Yu Liao, Haitao Xia
  • Patent number: 8874633
    Abstract: Methods and apparatus are provided for determining coefficients for a digital low pass filter, given cutoff and boost values for a corresponding analog version of the digital low pass filter. Coefficients are determined for a digital low pass filter by obtaining cutoff and boost values for a corresponding analog version of the digital low pass filter; and determining the coefficients for the digital low pass filter based on the obtained cutoff and boost values.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Erich F. Haratsch
  • Patent number: 8875005
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: October 28, 2014
    Assignee: AGERE Systems Inc.
    Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
  • Patent number: 8749906
    Abstract: Various embodiments of the present invention provide systems, methods and media formats for efficiently determining a position error of a head in relation to a storage medium. In one case, a system is disclosed that includes a storage medium with a series of data. The series of data includes a first defined marker and a second defined marker located a distance from the first defined marker, and position location data. The systems further include a first detector circuit that is operable to detect the first defined marker and to establish a location of the first defined marker, and a second detector circuit that is operable to detect the second defined marker and to establish a location of the second defined marker. The systems further include an error calculation circuit and an interpolation circuit. The error calculation circuit is operable to calculate an interpolation offset based at least in part on the location of the first defined marker and the location of the second defined marker.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: June 10, 2014
    Assignee: Agere Systems Inc
    Inventor: Nayak Ratnakar Aravind
  • Patent number: 8730077
    Abstract: Methods and apparatus are provided for processing a signal in a read channel using a selective oversampled analog to digital conversion. The disclosed selective oversampled analog to digital conversion simplifies the analog design by transferring at least a portion of the equalization and/or filtering processes to the digital domain. An analog input signal in a read channel is converted to a digital signal to generate one or more digital samples corresponding to the analog input signal for a given bit interval. The analog input signal is selectively filtered in an analog domain in a first mode and the digital samples are selectively filtered in a digital domain in a second mode. A data detection algorithm is applied to the digital samples to obtain a detected output. The selection of the first mode and the second mode can be, for example, based on channel conditions. The analog to digital conversion can be performed at a baud rate in the first mode and at an oversampled rate in the second mode.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 20, 2014
    Assignee: LSI Corporation
    Inventors: James A. Bailey, Nayak Ratnakar Aravind, Robert H. Leonowich, Erich F. Haratsch
  • Publication number: 20130335844
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 19, 2013
    Inventors: Nayak Ratnakar Aravind, Yu Liao, Haitao Xia