Abstract: An apparatus for augmented and virtual reality systems can include a mount, a base, a linkage, a linkage sensor, and a receiver assembly. The mount can releasably attach to an anchor structure. The base can be adjustably engaged or fixedly engaged with the mount. The linkage can be adjustably engaged with the base. The linkage sensor can sense the orientation of the linkage relative to the base. The receiver assembly can receive a tool.

Abstract: The present application discloses methods useful for the multiplex measurement of enzymatic activities. Also disclosed are polynucleotide constructs, constructs libraries and compartments related suitable for use in the methods.

Abstract: A patient monitor includes a clamping device on its rear surface for securely holding the monitor on an intravenous line (IV) pole. The clamping device is operated by the user with a sliding lever located on the side of the unit. The clamping mechanism has a ratcheting device to maintain the clamping force on the IV pole applied by the user with a simple one hand pull. The sliding lever has two buttons that release the clamp from the IV pole when the buttons are depressed simultaneously. The IV pole clamping system provides a simple and reliable mechanism for securely attaching the patient monitor to a stretcher IV pole or a free standing IV pole during patient transfer.

Abstract: A patient monitor includes a clamping device on its rear surface for securely holding the monitor on an intravenous line (IV) pole. The clamping device is operated by the user with a sliding lever located on the side of the unit. The clamping mechanism has a ratcheting device to maintain the clamping force on the IV pole applied by the user with a simple one hand pull. The sliding lever has two buttons that release the clamp from the IV pole when the buttons are depressed simultaneously. The IV pole clamping system provides a simple and reliable mechanism for securely attaching the patient monitor to a stretcher IV pole or a free standing IV pole during patient transfer.

Abstract: The present specification discloses a ventilator system that can be manufactured quickly with minimal skill requirements and rapidly deployed in response to epidemic respiratory disease conditions. In one embodiment, the ventilator, having a minimal number of controls, is used to give ventilation or mechanical breathing to a patient suffering ARDS. The mechanical ventilation is based on pressure control and has variable pressure, breathing rate, and oxygenation. Preferably, the ventilator is rapidly deployable, easy and intuitive to operate, and capable of sustaining at least 75% of epidemic respiratory distress victims who require assisted ventilation until resuming normal breathing.

Abstract: The present invention relates generally to the field of ventilators, and, more specifically, to a ventilator system that addresses respiratory distress due to the onset of an epidemic or pandemic disease state. In particular, the present invention is a ventilator system that can be manufactured quickly with minimal skill requirements and employed rapidly in response to epidemic respiratory disease conditions.

Abstract: The present invention relates generally to the field of ventilators, and, more specifically, to a ventilator system that addresses respiratory distress due to the onset of an epidemic or pandemic disease state. In particular, the present invention is a ventilator system that can be manufactured quickly with minimal skill requirements and employed rapidly in response to epidemic respiratory disease conditions.

Abstract: The present invention relates generally to the field of ventilators, and, more specifically, to a ventilator system that addresses respiratory distress due to the onset of an epidemic or pandemic disease state. In particular, the present invention is a ventilator system that can be manufactured quickly with minimal skill requirements and employed rapidly in response to epidemic respiratory disease conditions. In one embodiment, the present invention is directed toward a ventilator having a gas input, an inhalation conduit connected to the gas input, a patient flow control valve, operably connected to the gas input via the inhalation conduit, a patient interface, separated from the inhalation conduit by the flow control valve, and a gas shut-off mechanism that senses a pressure state in the inhalation conduit.

Abstract: An apparatus for selecting a clock source in a microprocessor. The apparatus receives a first clock and a second clock. The apparatus has a clock select unit capable of detecting the first clock and selecting between the first clock and the second clock without an external selection signal indicating which clock is to be selected. If the clock selection unit detects the first clock, then the first clock is selected. Otherwise, if the first clock is not detected, then the second clock is selected. The clock selection unit provides an output clock based on the selection.

Abstract: A method and apparatus for configuring the address space of a computer is described. According to the present invention, a computer system has a full address space and includes at least one base unit, at least one expansion unit and a microprocessor core. The microprocessor core issues access addresses. The full address space includes a base address space and an expanded address space. The base address space is addressed by an M bit address and the expanded address space is addressed by an N bit address (N.gtoreq.M). Each base unit is mapped to an address within the base address space, and the base unit address is mirrored in the expanded address space. Each expansion unit is mapped to an address within the expanded address space. An address configuration circuit in the computer system includes an address space remapping circuit for selectively remapping or not remapping base units out of the base address space.

Abstract: A peripheral interface unit (PIU) used by a microcontroller or microprocessor core having a pipelined architecture to access peripheral modules across a peripheral bus (PBUS). Data read or write accesses to registers in the core space are decoded and passed to the PIU. Then the access is executed across a peripheral address bus portion of the PBUS and a peripheral data bus of the PBUS by the PIU. In a pipelined architecture, during any one cycle there could exist up to two read accesses and one write access to the core registers. The PIU provides the needed logic to arbitrate these three access across the PBUS. In such cases the PIU inserts proper pipeline stalls until all the accesses are completed. All read accesses from the core registers cause at least a one state pipeline stall. Write accesses only stall the pipeline if two core register writes follow each other and the PBUS is not ready at the time of the second access or if a read and write occur at the same time.