Patents by Inventor Ning Liu

Ning Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220392987
    Abstract: A display substrate, a preparation method therefor, and a display apparatus. The display substrate includes a first metal layer, a metal oxide layer and a second metal layer, which are stacked on a base. The metal oxide layer includes a first active layer, the first active layer including a channel region, a source transition region, and a drain transition region, wherein both the source transition region and the drain transition region comprise a first region and a second region.
    Type: Application
    Filed: July 20, 2021
    Publication date: December 8, 2022
    Inventors: Ning LIU, Dacheng ZHANG, Jun GENG, Feng ZHANG, Yang PAN, Bin ZHOU, Liangchen YAN
  • Patent number: 11501227
    Abstract: The present disclosure relates to devices, methods, and computer-readable medium for providing recommendations for alternate resources to use for cloud services. The devices, methods, and computer-readable medium may receive a resource allocation request for a new resource of a computing system and may predict an occurrence of a capacity related allocation for the resource allocation request. The devices, methods, and computer-readable medium may identify alternate resources to use for the resource allocation request and may provide recommendations with the alternate resources.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: November 15, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Gowri Bhaskara, Wei Zou, Brent Michael Jensen, Ahmed Ragab Nabhan Mostafa, Bhaumik Chokshi, Zainab Hakim, Shanti Kemburu, Ning Liu, Benjamin Walter Martens, Nicholas Anthony Swanson
  • Publication number: 20220359847
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a substrate, and a compensation electrode, an auxiliary electrode, a light-emitting functional layer, and a cathode layer arranged on one side of the substrate. The auxiliary electrode is arranged on one side of the compensation electrode away from the substrate, and coupled to the compensation electrode. A first notch is formed in a side surface of the auxiliary electrode, and at least a part of the first notch extends in a direction parallel to the substrate. The light-emitting functional layer is arranged on one side of the auxiliary electrode away from the substrate, and interrupted at the first notch. The cathode layer is arranged on one side of the light-emitting functional layer away from the substrate, and coupled to the auxiliary electrode at the first notch.
    Type: Application
    Filed: April 21, 2021
    Publication date: November 10, 2022
    Inventors: Can YUAN, Yongqian LI, Bin ZHOU, Ning LIU, Zhidong YUAN
  • Publication number: 20220352382
    Abstract: A thin film transistor, including: at least one active layer pattern including a first conductive pattern, a second conductive pattern, and a semiconductor pattern; a gate on a side of the active layer pattern; a first electrode and a second electrode on a side of the gate away from the active layer pattern, and respectively electrically connected with the first conductive pattern and the second conductive pattern, a conductive shielding pattern is provided corresponding to the semiconductor pattern in at least one active layer pattern, the conductive shielding pattern is on a side of the semiconductor pattern away from the gate and is electrically connected with the first electrode, and a buffer layer is between the conductive shielding pattern and the semiconductor pattern; an orthographic projection of the conductive shielding pattern on a plane where the semiconductor pattern corresponding thereto is located at least partially covers the semiconductor pattern corresponding.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 3, 2022
    Inventors: Qinghe WANG, Tongshang SU, Jun WANG, Yongchao HUANG, Haitao WANG, Ning LIU, Jun CHENG, Yingbin HU
  • Patent number: 11469394
    Abstract: The present invention relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a first electrode layer. The first electrode layer may include an indium tin oxide layer and a planarization layer. The indium tin oxide layer is disposed on a substrate and includes indium tin oxide particles; the planarization layer is disposed on a side of the indium tin oxide layer away from the substrate, and fills at least part of gaps between the indium tin oxide particles, and the planarization layer can conduct electricity.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: October 11, 2022
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., Beijing BOE Technology Development Co., Ltd.
    Inventors: Leilei Cheng, Tongshang Su, Qinghe Wang, Guangyao Li, Wei Song, Ning Liu, Yang Zhang, Yongchao Huang
  • Patent number: 11469260
    Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device including the display substrate. The method includes: forming a conductive layer; forming a first photoresist pattern and a second photoresist pattern on the conductive layer, in which the adhesion between the first photoresist pattern and the conductive layer is less than the adhesion between the second photoresist pattern and the conductive layer; and etching the conductive layer by using the first photoresist pattern and the second photoresist pattern as masks to form a first conductive pattern and a second conductive pattern, respectively, in which a line width difference between the first conductive pattern and the first photoresist pattern is greater than a line width difference between the second conductive pattern and the second photoresist pattern.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: October 11, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., Beijing BOE Technology Development Co., Ltd.
    Inventors: Ning Liu, Bin Zhou, Jun Liu, Yang Zhang, Tongshang Su, Haitao Wang
  • Patent number: 11438097
    Abstract: A media content-based adaptive method, device and system for Forward Error Correction (FEC) coding and decoding of a systematic code, and a medium are provided. The method includes: dividing, according to the importance of media content, source data into N types of source data packets according to priorities; generating N types of intermediate codes according to the N types of source data packets and the priorities thereof; setting, according to the N types of intermediate codes, recovery data of N types of source data according to a channel condition, and generating coded symbols of N types of systematic codes; receiving the coded symbols, and arranging and sorting the coded symbols according to decoding requirements; and decoding, according to the number of received coded symbols, intermediate codewords according to different situations, and recovering the corresponding source data packets according to the intermediate codewords.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: September 6, 2022
    Assignee: SHANGHAI JIAO TONG UNIVERSITY
    Inventors: Yiling Xu, Wenjun Zhang, Ning Liu, Yunfeng Guan, Yanfeng Wang, Jun Sun, Zhiqian Jiang, Hao Chen
  • Publication number: 20220255038
    Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a base substrate, and an auxiliary cathode structure located on a side of the base substrate, the auxiliary cathode structure including a first conductive layer, an intermediate support layer, and a second conductive layer. In an implementation, a side of the intermediate support layer close to the first conductive layer includes any one or more of first protrusions and first grooves, and a side of the first conductive layer close to the intermediate support layer includes any one or more of second grooves engaged with the first protrusions and second protrusions engaged with the first grooves which are correspondingly disposed.
    Type: Application
    Filed: September 22, 2021
    Publication date: August 11, 2022
    Inventors: Qinghe WANG, Jun CHENG, Tongshang SU, Ning LIU, Haitao WANG, Yongchao HUANG, Jingang FANG, Liusong NI, Liangchen YAN
  • Publication number: 20220247671
    Abstract: A device virtualization method, apparatus and system, a device and a non-transitory computer-readable storage medium are disclosed. The device virtualization method may include: determining virtual information of a virtual device based on device information of a local device and device information of a peer device, the local device and the peer device are a plurality of first devices in a Multichassis Link Aggregation Group (MC-LAG), the device information comprises a bridge ID and a port ID, and the virtual information comprises a virtual bridge ID and a target port ID; switching an extended protocol message with the peer device; and determining a role and state of the port of the local device based on the virtual information and the extended protocol message of the peer device in combination with a protocol message received by the local device.
    Type: Application
    Filed: October 28, 2020
    Publication date: August 4, 2022
    Inventors: Ning LIU, Zhixiang CAI
  • Patent number: 11404515
    Abstract: A display substrate and a manufacturing method thereof, and a display device, are disclosed. The display substrate includes a base substrate and a thin film transistor (TFT) array, including a plurality of TFTs. A first electrode in each TFT includes a first portion and a second portion, a height of the second portion being greater than a height of the first portion in a direction perpendicular to the base substrate, wherein the first portion forms a groove with respect to the second portion and a wall of the groove comprises the second portion of the first electrode of a thin film transistor adjacent to the TFT. A bottom of the groove is the first pixel electrode of a light emitting element, wherein an organic light emitting functional layer is deposited in the groove on the first pixel electrode, and the second pixel electrode on the organic light emitting functional layer.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: August 2, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD..
    Inventors: Wei Song, Ce Zhao, Yuankui Ding, Heekyu Kim, Ming Wang, Ning Liu, Yingbin Hu
  • Patent number: 11396667
    Abstract: The disclosure discloses an enzymatic method for preparation of lecithin polyunsaturated fatty acids (PUFAs), and belongs to the technical field of separation and application of enzyme. A heat treatment procedure is added after a reaction substrate is in contact with an enzyme to adjust the ratio of sn-1 lysophospholipid PUFAs to sn-2 lysophospholipid PUFAs in a reaction product and to promote the production of sn-2 lysophospholipid PUFAs, thereby promoting the production of lecithin PUFAs, which greatly increases the production efficiency of lecithin PUFAs and the lecithin PUFA content in the product. With simple operations and high reaction rate, the method can significantly increase the content of lecithin PUFAs in the product, can effectively avoid the oxidation of PUFA, and has high economic benefits and promising industrial application prospects.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: July 26, 2022
    Inventors: Daoming Li, Kankan Liu, Ning Liu, Junjie Cui
  • Publication number: 20220230949
    Abstract: A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.
    Type: Application
    Filed: October 12, 2021
    Publication date: July 21, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Hsin-Ning Liu, Jun-Rui Huang, Pei-Wei Wang, Ching Sheng Chen, Shih-Lian Cheng
  • Publication number: 20220190762
    Abstract: A parameterless and position-sensorless MTPA control of a permanent magnet synchronous motor including: using three rotating reference frames having different observation angles to parse the current vector; using a target current value and a preset current-rotor angle y that is between the current vector and the qr-axis of the (dr, qr) rotor reference frame to obtain the angles between the current vector, the voltage vector, and the rotor position; obtaining the target voltage value and the target voltage angle by using the obtained angles to obtain the target phase voltage values for regulation. The method is simple in controlling the motor, improves the control efficiency and reliability, and improves the control accuracy.
    Type: Application
    Filed: March 3, 2022
    Publication date: June 16, 2022
    Inventors: Ning LIU, Wei GUO, Yan YANG
  • Patent number: 11347148
    Abstract: A patterning method and a method for manufacturing an array substrate are provided, and the patterning method includes: forming a photolithography auxiliary film and a positive photoresist film in turn on a base substrate provided with a layer to be patterned; subjecting the photolithography auxiliary film and the positive photoresist film to a photolithography process to form a photolithography auxiliary layer pattern and a positive photoresist pattern; patterning the layer to be patterned; and UV irradiating the photolithography auxiliary layer pattern and the positive photoresist pattern and then removing the photolithography auxiliary layer pattern and the positive photoresist pattern.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: May 31, 2022
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Wei Li, Bin Zhou, Jun Liu, Ning Liu, Yang Zhang, Yingbin Hu
  • Patent number: 11342431
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: May 24, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Qinghe Wang, Ning Liu, Yongchao Huang, Yu Ji, Zheng Wang, Liangchen Yan
  • Patent number: 11335710
    Abstract: A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: May 17, 2022
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Qinghe Wang, Tongshang Su, Yongchao Huang, Yingbin Hu, Yang Zhang, Haitao Wang, Ning Liu, Guangyao Li, Zheng Wang, Yu Ji, Jinliang Hu, Wei Song, Jun Cheng, Liangchen Yan
  • Publication number: 20220140579
    Abstract: Disclosed is a threading device suitable for a building electrical pipeline. The threading device comprises a fan, a take-up and pay-off main machine and a connecting hose. A take-up state induction mechanism mainly composed of a bent pipe converging device, a first rotating shaft, a bent pipe converging device lifting spring and a first microswitch is creatively arranged in a ventilation bin. When a strong wire is tightened, the bent pipe converging device is easy to rotate along with tightening of the strong wire, and the strong wire makes contact with the first microswitch in time when being tightened. After the strong wire is loosened, the bent pipe converging device can automatically return under the action of the bent pipe converging device lifting spring, and the take-up state of a wire wheel is recovered.
    Type: Application
    Filed: January 13, 2022
    Publication date: May 5, 2022
    Inventors: Ning Liu, Zao Feng, Hao Liu
  • Publication number: 20220093893
    Abstract: A method for manufacturing a display panel includes: sequentially forming a conductive pattern, a light-emitting layer and a cathode layer on a substrate. The conductive pattern is formed by a one-time patterning process, and includes an auxiliary electrode layer. In a direction parallel to the substrate, both the first protective electrode and the second protective electrode in the auxiliary electrode layer extend over the metal electrode, a second orthographic projection of the second protective electrode on the substrate is within a first orthographic projection of the first protective electrode on the substrate, and an outer boundary of the second orthographic projection is staggered from an outer boundary of the first orthographic projection. The cathode layer is in contact with the first protective electrode and a sidewall of the metal electrode.
    Type: Application
    Filed: June 2, 2021
    Publication date: March 24, 2022
    Inventors: Yang Zhang, Ning Liu, Bin Zhou, Leilei Cheng, Liangchen Yan, Jun Liu, Qinghe Wang, Tao Sun, Zhiwen Luo
  • Publication number: 20220065840
    Abstract: The present disclosure provides a method for analysis of the position distribution of lecithin fat acid, relating to the technical field of oil processing. The analysis method according to the present disclosure makes it possible to catalyze lecithin to complete alcoholysis in a short time with Novozym 435 or Lipozyme 435 in the present of excess anhydrous ethanol, thereby quickly and accurately analyzing the position distribution of lecithin fat acid. Novozym 435 or Lipozyme 435 exhibits a strong sn-1 position specificity and an extremely high reactivity to lecithin in the present of excess anhydrous ethanol, thereby greatly increasing the reaction rate of the alcoholysis to ensure quick and complete alcoholysis of lecithin, avoiding the occurrence of the transfer of acyl group, and improving the accuracy of the analysis results. Also, the use of the anhydrous ethanol could effectively avoid the generation of fatty acid as a by-product of hydrolysis, and simplify subsequent analysis steps.
    Type: Application
    Filed: August 5, 2021
    Publication date: March 3, 2022
    Inventors: Daoming LI, Xiaorong ZHONG, Duan ZHOU, Panxue WANG, Ning LIU
  • Publication number: 20220064783
    Abstract: A sputtering system and a deposition method are provided. The sputtering system includes at least two sputtering chambers. Each of the at least two sputtering chambers includes a plurality of targets separated from each other and a plurality of target pedestals. Each of the plurality of targets is mounted on a corresponding target pedestal of the plurality of target pedestals, and a gap between two adjacent targets of the plurality of targets has a width sufficient to accommodate at least one of the plurality of targets.
    Type: Application
    Filed: October 14, 2021
    Publication date: March 3, 2022
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang SU, Dongfang WANG, Leilei CHENG, Jun LIU, Ning LIU, Qinghe WANG, Liangchen YAN