Patents by Inventor Noboru Akiyama

Noboru Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050089734
    Abstract: In order to provide a fuel cell apparatus with an effective energy consumption by selecting a suitable fuel cartridge mounted on the apparatus, the present invention provides a fuel cell apparatus comprising at least two fuel storage sections for storing fuel for power generation, wherein at least one of the storage sections is selected and used, while the fuel cell is in service.
    Type: Application
    Filed: August 18, 2004
    Publication date: April 28, 2005
    Applicant: Hitachi, Ltd.
    Inventors: Yasuaki Norimatsu, Akihiko Kanouda, Noboru Akiyama, Mutsumi Kikuchi
  • Patent number: 6853063
    Abstract: Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: February 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
  • Publication number: 20050005619
    Abstract: An air conditioning system is arranged to use a power line for communication. The air conditioning system includes one or more indoor units, one or more outdoor units, and a system controller for controlling the indoor units or outdoor units and executes communications between the indoor units and the outdoor units as overlapping a signal on the power line for supplying electric power. The outdoor units are connected with the system controller through a leased communication line. The indoor unit provides a power line communication device being connected with the power line. The outdoor unit provides a leased communication device being connected with the leased communication line. A bridge is also provided for connecting the leased communication line and the power line. The control information is exchanged mutually between the indoor units, the outdoor units and the system controller through the power line.
    Type: Application
    Filed: April 14, 2004
    Publication date: January 13, 2005
    Inventors: Yasuyuki Kojima, Noboru Akiyama, Takeshi Onaka, Tatsumi Yamauchi, Koichi Taniguchi, Koichi Tokushige, Noriyuki Bunkou, Keiji Sato
  • Patent number: 6781564
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: August 24, 2004
    Assignees: Hitachi, Ltd., Fujitsu Limited
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Publication number: 20030201523
    Abstract: Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.
    Type: Application
    Filed: May 22, 2003
    Publication date: October 30, 2003
    Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
  • Patent number: 6611051
    Abstract: Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: August 26, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
  • Publication number: 20030122737
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Application
    Filed: December 17, 2002
    Publication date: July 3, 2003
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Publication number: 20030050970
    Abstract: An information evaluation system evaluating information to be viewed on a network is disclosed, the system being provided with receiving unit receiving a report on information which is inappropriate for viewing; evaluating unit evaluating an inappropriateness level of the information based on the report; and distributing unit distributing information regarding locations on a network of such inappropriate information having the inappropriateness level in a predetermined range.
    Type: Application
    Filed: February 5, 2002
    Publication date: March 13, 2003
    Applicant: Fujitsu Limited
    Inventor: Noboru Akiyama
  • Publication number: 20030027036
    Abstract: A protection apparatus for storage battery for storing and feeding power comprises an anomaly detection unit for detecting an anomalous state in at least one of the voltage, a current flow, and the frequency in at least one of an input power and an output power of the storage battery, the temperature and the pressure in the storage battery, and an external force applied to the storage battery, and a short-circuit unit for shorting both electrodes of the storage battery when an anomaly is detected in at least one of the input power, the output power, and the storage battery.
    Type: Application
    Filed: September 26, 2002
    Publication date: February 6, 2003
    Inventors: Akihiko Emori, Hideki Miyazaki, Noboru Akiyama, Akihiro Takanuma, Yoshimi Miyamoto
  • Patent number: 6496166
    Abstract: As is obvious from the description in the specification and the attached drawings, the present invention provides a display apparatus for displaying an image on a display panel by turning on pixels of said display panel, said display apparatus comprising: a display panel provided with: address electrodes driven by address pulses based on a video input signal; and sustain electrodes crossing said address electrodes and sandwiching electrical discharging units of pixels with said address electrodes and driven by sustain pulses; a sustain-electrode drive circuit for generating said sustain pulses and scan pulses, provided with a common circuit for generating said sustain pulses or said scan pulses in response to an operating state thereof and for supplying said scan pulses and said sustain pulses to said sustain electrodes.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 17, 2002
    Assignees: Hitachi, Ltd., Fujitsu Limited
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Publication number: 20020153165
    Abstract: There is disclosed a method of narrowing a focus of a powerful electromagnetic wave such as excimer laser toward a capacitor formed in a glass substrate, and adjusting and trimming a change amount of crystallized glass formed in this portion in a limited manner. A capacity value can be trimmed without influencing an outer configuration and other peripheral components, a circuit board whose property is unchanged and whose dispersion is little can be manufactured, and the capacity value can more precisely be adjusted by trimming an exclusive-use capacitor.
    Type: Application
    Filed: August 29, 2001
    Publication date: October 24, 2002
    Inventors: Yasuyuki Kojima, Seigou Yukutake, Noboru Akiyama, Takao Miwa, Takashi Naito, Toshiya Sato
  • Publication number: 20020125555
    Abstract: Wire bonding or printed wiring board leads or alternatively lead frames or equivalents thereof are used to electrically connect among external electrodes of high withstand voltage capacitors as formed on a plurality of semiconductor chips. A driver circuitry for signal transmission or receiver circuitry for signal receipt being formed on the semiconductor chips is electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing said plurality of semiconductor chips to be received within either a single package or a single module. Whereby a semiconductor device is capable of achieving both dielectricity and size reduction.
    Type: Application
    Filed: September 28, 2001
    Publication date: September 12, 2002
    Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
  • Publication number: 20020117750
    Abstract: In a semiconductor device, an imbedded insulating layer is formed in a semiconductor substrate. A plurality of electric circuits are formed on the imbedded insulating layer so as to be insulated each other, and are capacitively coupled through the semiconductor substrate. Wiring layers are formed on the electric circuits, and include inside electrodes which are capacitively coupled to the electric circuits. The electric circuits are connected through capacitors which are formed through the semiconductor substrate, and through capacitors which are formed through the electrodes.
    Type: Application
    Filed: September 28, 2001
    Publication date: August 29, 2002
    Inventors: Yasuyuki Kojima, Seigou Yukutake, Minehiro Nemoto, Nobuyasu Kanekawa, Noboru Akiyama
  • Patent number: 6297618
    Abstract: A power storage device has a plurality of series-connected storage battery units, battery circuits associated with the storage battery units to control or monitor the storage battery units, respectively; a main circuit of a potential level different from that of the battery circuits; and a potential level changing circuits connecting the battery circuit to the main circuit. The power storage unit is small in construction and operates at a low power consumption in a high control accuracy.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: October 2, 2001
    Assignee: Hitachi Ltd.
    Inventors: Akihiko Emori, Takuya Kinoshita, Hideki Miyazaki, Yasuyuki Kojima, Noboru Akiyama
  • Publication number: 20010011881
    Abstract: A power storage device has a plurality of series-connected storage battery units, battery circuits associated with the storage battery units to control or monitor the storage battery units, respectively; a main circuit of a potential level different from that of the battery circuits; and a potential level changing circuits connecting the battery circuit to the main circuit. The power storage unit is small in construction and operates at a low power consumption in a high control accuracy.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 9, 2001
    Applicant: HITACHI, LTD.
    Inventors: Akihiko Emori, Takuya Kinoshita, Hideki Miyazaki, Yasuyuki Kojima, Noboru Akiyama
  • Patent number: 6040827
    Abstract: A driver circuit wherein a first switching element and a second switching element are totem-pole-connected, wherein the totem pole connection is connected at its one end, node and other end with a power source, an output to a load and a reference potential, respectively, wherein the first switching element is connected between the one end and the node, wherein the second switching element is connected between the node and the other end, and wherein a third switching element is connected between the one end of the totem pole connection and the control terminal of the first switching element.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: March 21, 2000
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Kazuhiro Shiina, Koji Kawamoto, Masato Miura, Hitoshi Ohura, Shoichi Ozeki, Noboru Akiyama, Kunihoro Nunomura, Minehiro Nemoto, Masahiro Iwamura
  • Patent number: 6032229
    Abstract: An information processor having a high performance as a whole is provided by improving the throughput of the processor and the semiconductor memory device. The information processor comprises a memory having a buffer for temporarily holding data and a processor having a memory interface part for controlling the memory to transfer data to the buffer before determining whether the data is to be written in the memory and to write the data in said memory after determining of writing. Data writing and reading to the semiconductor device is pipelined by justifying data exchange between reading and writing. Since the data transfer timings of reading from a memory and writing in the memory can be executed at the same time, the reading process and the writing process can be performed by pipeline-like process and the throughput can be improved.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: February 29, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hotta, Hideo Sawamoto, Noboru Akiyama, Takashi Akioka, Shigeya Tanaka
  • Patent number: 5940272
    Abstract: An electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing, which has a cavity therein, is provided with a plurality of projections for radiating heat generated by the electric parts in the cavity. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. Further, an electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. The casing is provided therein with a partition wall which is made of electrically conductive material for dividing the interior of the casing into a plurality of zones along a direction of a flow of the heat conductive medium.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: August 17, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Emori, Hiroyuki Hanei, Tsunehiro Endo, Tomoyuki Someya, Masahiro Iwamura, Noboru Akiyama, Kazuo Kato
  • Patent number: 5764623
    Abstract: A disk cartridge comprises a case including an upper and lower shell halves for accommodating a disk and an opening portion provided on each shell half, so as to be opened and closed by a shutter. Each shell half is formed by an injection molding of polycarbonate in which a mold having a single injection hole is used. The injection hole is formed in the mold, at a position opposed to a center of a groove in its longitudinal direction on a surface of the case for receiving a retaining plate to guide a front portion of a slide plate of the shutter. The injection hole has a diameter of about 1.5 mm in case of a 5-inch disk cartridge.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: June 9, 1998
    Assignee: Dai Nippon Insatsu Kabushiki Kaisha
    Inventors: Noboru Akiyama, Katsumi Kameda
  • Patent number: 5761150
    Abstract: There is provided a method of controlling an internal address signal of an RAM in which a late-write method is realized on a chip. Two sets of address registers for reading and writing are provided for each address and further a middle register is provided between the two sets of address registers. The middle register is controlled by a signal formed by obtaining the AND result of a clock signal and a write enable signal and the two sets of address registers for reading and writing are controlled only by the clock signal. A selection circuit selects outputs of the two sets of address registers as an input in accordance with the write enable signal to control an internal address.
    Type: Grant
    Filed: May 21, 1996
    Date of Patent: June 2, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Seigoh Yukutake, Kinya Mitsumoto, Takashi Akioka, Masahiro Iwamura, Noboru Akiyama