Patents by Inventor Nobuaki Ishiga

Nobuaki Ishiga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150162351
    Abstract: A gate wiring, a source electrode, a source-electrode connecting wiring, a pixel electrode, a gate-terminal extraction electrode, and a source-terminal extraction electrode are formed in the same layer on a planarization insulating film. The gate wiring is connected to a gate electrode through a gate-electrode-portion contact hole. The source electrode is connected to a semiconductor film through a source-electrode-portion contact hole. The source-electrode connecting wiring is connected to the semiconductor film and a source wiring through the source-electrode-portion contact hole and a source-wiring-portion contact hole, respectively. The pixel electrode is connected to the semiconductor film through a drain (pixel)-electrode-portion contact hole.
    Type: Application
    Filed: November 25, 2014
    Publication date: June 11, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kyosuke HIWATASHI, Kazunori INOUE, Kouji ODA, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Publication number: 20150001530
    Abstract: To reduce the number of photolithography processes in manufacturing an active matrix substrate. Provided is a TFT substrate which has a pixel electrode connected to a drain electrode of a TFT, a source line connected to a source electrode of the TFT, and a gate line connected to a gate electrode of the TFT. A source electrode, a drain electrode, and a source line include a conductive film of the same layer as the pixel electrode. Under the source line and the pixel electrode, there remains a semiconductor layer of the same layer as a semiconductor film which constitutes a channel part of the TFT substrate.
    Type: Application
    Filed: June 23, 2014
    Publication date: January 1, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Nobuaki ISHIGA, Kazunori INOUE, Naoki TSUMURA, Kensuke NAGAYAMA, Yasuyoshi ITO
  • Publication number: 20140319515
    Abstract: A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film.
    Type: Application
    Filed: April 17, 2014
    Publication date: October 30, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kensuke NAGAYAMA, Kazunori INOUE, Yasuyoshi ITO, Nobuaki ISHIGA, Naoki TSUMURA, Shinichi YANO
  • Publication number: 20140299881
    Abstract: A TFT array substrate has an organic insulating film formed of a photosensitive organic resin material. A common electrode and a lead-out wiring are formed on the organic insulating film, and a pixel electrode is formed above the common electrode with an interlayer insulating film provided between them. The pixel electrode is connected to the lead-out wiring through a contact hole formed in the interlayer insulating film. The lead-out wiring and the common electrode are connected to a drain electrode and a common wiring, respectively, through contact holes formed in the organic insulating film. A metal cap film is provided on each of the lead-out wiring and the common electrode in the contact holes formed in the organic insulating film.
    Type: Application
    Filed: March 21, 2014
    Publication date: October 9, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji ODA, Kazunori INOUE, Nobuaki ISHIGA, Osamu MIYAKAWA
  • Publication number: 20140104688
    Abstract: A display includes: a laminated wiring with a conductive film arranged on a foundation layer, and a transparent film and a translucent film arranged on the conductive film; a wiring terminal part arranged at an edge portion of the laminated wiring and having the same laminated structure as that of the laminated wiring; and an insulating film that covers the laminated wiring and the wiring terminal part.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 17, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masami HAYASHI, Kenichi MIYAMOTO, Nobuaki ISHIGA, Naoki TSUMURA, Kensuke NAGAYAMA
  • Publication number: 20140042430
    Abstract: A thin film transistor substrate includes a thin film transistor, a source wire, an upper-layer source wire, and a pixel electrode. The thin film transistor includes: a source electrode and a drain electrode located to be spaced from each other on the same plane; a semiconductor film located to straddle those electrodes; an insulating film located to cover at least the source electrode, the drain electrode, and the semiconductor film; an upper-layer source electrode and an upper-layer drain electrode located on the insulating film and respectively connected to the semiconductor film through contact holes; and a gate electrode located below or above the semiconductor film. The source wire extends from the source electrode. The upper-layer source wire extends from the upper-layer source electrode. The pixel electrode is electrically connected to the drain electrode.
    Type: Application
    Filed: July 25, 2013
    Publication date: February 13, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunori INOUE, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Publication number: 20130278549
    Abstract: A display device is provided with a laminated wiring including a low-resistance conductive film, a low-reflection film mainly containing Al and functioning as a reflection preventing film, and a cap film which are sequentially laminated on a transparent substrate, and an insulting film formed so as to cover the laminated wiring.
    Type: Application
    Filed: March 8, 2013
    Publication date: October 24, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masami HAYASHI, Kenichi MIYAMOTO, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Patent number: 8558248
    Abstract: In accordance with one aspect of the present invention, an Al alloy film contains a first additive element composed of Ni, and at least one type of second additive element selected from the group consisting of Group 2A alkaline earth metals and Groups 3B and 4B metalloids in Period 2 or 3 of the periodic table of the elements. Furthermore, the composition ratio of the first additive element is 0.5-5 at %, and the composition ratio of the second additive element is 0.1-3 at %.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 15, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Takumi Nakahata
  • Patent number: 8546804
    Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Ono, Naoki Nakagawa, Yusuke Yamagata, Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Toru Takeguchi
  • Patent number: 8405091
    Abstract: A display device includes a metal conductive layer formed on a substrate, a transparent electrode film formed on the substrate and joined to the metal conductive layer and an interlayer insulating film isolating the metal conductive layer and the transparent conductive film. The metal conductive layer has a lower aluminum layer made of aluminum or aluminum alloy, an intermediate impurity containing layer made of aluminum or aluminum alloy containing impurities and formed on a substantially entire upper surface of the lower aluminum layer and an upper aluminum layer made of aluminum or aluminum alloy and formed on the intermediate impurity containing layer. In the interlayer insulating film and the upper aluminum layer, a contact hole penetrates therethrough and locally exposes the intermediate impurity containing layer, and the transparent electrode film is joined to the metal conductive layer in the intermediate impurity containing layer exposed from the contact hole.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: March 26, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Kazunori Inoue, Koji Oda, Naoki Nakagawa, Nobuaki Ishiga
  • Patent number: 8248564
    Abstract: A liquid crystal display device includes a gate line placed above a substrate, a gate insulating layer to cover the gate line, a source line placed above the gate insulating layer, an interlayer insulating layer to cover the source line, a comb-shaped or slit-shaped pixel electrode electrically connected a drain electrode of a TFT through a contact hole penetrating the interlayer insulating layer, a first counter electrode placed below and opposite to the pixel electrode with an insulating layer interposed therebetween to generate an oblique electric field with the pixel electrode, and a second counter electrode formed in the same layer as the pixel electrode and placed overlapping the source line in a given area to generate an in-plane electric field with the pixel electrode.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: August 21, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shingo Nagano, Osamu Miyakawa, Nobuaki Ishiga
  • Publication number: 20120112194
    Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Ono, Naoki Nakagawa, Yusuke Yamagata, Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Toru Takeguchi
  • Patent number: 8159749
    Abstract: An antireflection coating is formed on a transparent substrate and includes an Al film having a transmittance of lower than 10% at a wavelength of 550 nm with a thickness of 25 nm and predominantly composed of aluminum (Al), and an Al—N film formed in at least one of an upper layer and a lower layer of the Al film, having a transmittance of equal to or higher than 10% at a wavelength of 550 nm with a thickness of 25 nm, predominantly composed of Al and at least containing a nitrogen (N) element as an additive. A specific resistance of the antireflection coating is equal to or lower than 1.0×10?2 O·cm, and a reflectance of a surface of the Al—N film is equal to or lower than 50% in a visible light region.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Naoki Tsumura, Nobuaki Ishiga, Takeshi Ono, Naoki Nakagawa, Masafumi Agari, Yusuke Yamagata, Kensuke Nagayama
  • Patent number: 8040054
    Abstract: An organic electroluminescence type display apparatus according to an aspect of the present invention includes: a thin film transistor formed on an insulating substrate; and an organic EL device connected to the thin film transistor and including at least an anode, an electroluminescence layer, and a cathode stacked on each other in this order. The anode includes: an Al alloy film having conductivity and including at least one kind of Group 8 3d transition metals, and oxygen, the at least one kind of the Group 8 3d transition metals and the oxygen being added to aluminum; and an amorphous ITO film formed on the Al alloy film.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: October 18, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kensuke Nagayama, Kazunori Inoue, Nobuaki Ishiga
  • Patent number: 8039852
    Abstract: A display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate has a counter electrode, and the TFT array substrate has a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: October 18, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Harumi Murakami, Toshio Araki, Nobuaki Ishiga
  • Patent number: 8031283
    Abstract: An active matrix substrate according to one aspect of the present invention is a TFT array substrate including a TFT. The active matrix substrate includes a gate signal line electrically connected to a gate electrode of the TFT, a first insulating film formed above the gate signal line, an auxiliary capacitance electrode formed above the first insulating film and supplied with a common potential, a second insulating film formed above the auxiliary capacitance electrode, a source signal line formed above the second insulating film and electrically connected to a source electrode of the TFT, a third insulating film formed above the source signal line, and a pixel electrode formed above the third insulating film so that the pixel electrode overlaps with a part of the auxiliary capacitance electrode.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: October 4, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshio Araki, Osamu Miyakawa, Nobuaki Ishiga, Shingo Nagano
  • Patent number: 7915062
    Abstract: A TFT array substrate includes a TFT having an ohmic contact film and a source electrode and a drain electrode formed on the ohmic contact film. It also includes a pixel electrode electrically connected with the drain electrode. The source electrode and the drain electrode are made of an Al alloy containing Ni as an additive.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: March 29, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinichi Yano, Tadaki Nakahori, Nobuaki Ishiga
  • Patent number: 7910053
    Abstract: A semiconductor device includes a semiconductor layer, an Al alloy film electrically connected to the semiconductor layer, and a transparent electrode layer directly contacting with the Al alloy film at least over an insulating substrate. The Al alloy film includes one or more kinds of elements selected from Fe, Co and Ni in total of 0.5 to 10 mol %, and a remaining substantially comprises Al.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: March 22, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Kazumasa Kawase
  • Publication number: 20110012121
    Abstract: A display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate has a counter electrode, and the TFT array substrate has a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.
    Type: Application
    Filed: September 22, 2010
    Publication date: January 20, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: KAZUNORI INOUE, Harumi Murakami, Toshio Araki, Nobuaki Ishiga
  • Patent number: 7825515
    Abstract: A semiconductor device includes a film containing silicon as the main ingredient, and an aluminum alloy film, such as a source electrode and a drain electrode, that is directly connected to the film containing silicon as the main ingredient, such as an ohmic low-resistance Si film, and contains at least Al, Ni, and N in the vicinity of the bonding interface. The Aluminum alloy film has a good contact characteristic when directly connected to the film containing silicon as the main ingredient without having a barrier layer formed of high melting point metal.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: November 2, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Takumi Nakahata, Kazumasa Kawase