Abstract: The new structure of a memory cell which enables avoiding the problem of a step without increasing the number of processes, the structure of a semiconductor integrated circuit in which a common part of the same substrate in a manufacturing process is increased and the structure of the semiconductor integrated circuit which allows measures for environment obstacles without increasing the number of processes are disclosed. Memory cell structure in which a capacitor is formed in the uppermost layer of plural metal wiring layers by connecting the storage node of the capacitor to a diffusion layer via plugs and pads is adopted. It is desirable that a dielectric film formed in a metal wiring layer under the uppermost layer and a supplementary capacitor composed of a storage node and a plate electrode are connected to the capacitor. It is also desirable that the plate electrode of the capacitor covers the chip.

Abstract: A steplike offset between a memory cell array region and a peripheral circuit region, which is caused by a capacitor C, is reduced by an insulating film having a thickness substantially equal to the height of the capacitor C. Wiring or interconnection grooves are defined in the neighborhood of the surface of an insulating film whose surface is flattened by a CMP method. Further, connecting holes are defined in lower portions of the bottom faces of the interconnection grooves respectively. Second layer interconnections containing copper are formed within the interconnection grooves, and connecting portions containing copper are formed within the connecting holes. The second layer interconnections and first layer interconnections are connected to each other by the connecting portions whose lengths are shortened. The second layer interconnections and the connecting portions are integrally formed by a damascene method using the CMP method.

Abstract: A first multiplier 251 multiplies a reproduced RF signal rf(t) by a DC component of an APC monitoring output signal m(t), which component is an output signal from an LPF 252, and then supplies a signal resulting from the multiplication to an arithmetic unit 255. A second multiplier 254 multiplies the reproduced RF signal rf(t) by a laser noise component of the APC monitoring output signal m(t), which component is an output signal from an HPF 253, and then supplies a signal resulting from the multiplication to the arithmetic unit 255. The arithmetic unit 255 subtracts the signal from the multiplier 254 from the signal from the multiplier 251 to thereby remove both an additive noise component and a modulated noise component of laser noise.

Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.

Abstract: A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.

Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.

Abstract: A semiconductor integrated circuit device and a method of manufacturing such a device provides the advantages that undulations are prevented from being produced in the polycrystal silicon plugs in the bit line contact holes and that the undesired phenomenon of transversally etching the silicide film at the contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines BL formed at the time of forming a first wiring layer 18 is made of a laminate film having a titanium film 18a, a titanium nitride film 18b and a tungsten film 18c and a titanium silicide film 20 containing nitrogen or oxygen is formed in the contact areas of the bit lines BL and the plugs 19. A titanium silicide film 20 containing nitrogen or oxygen is also formed in the contact areas of the first wiring layer 18 and the semiconductor substrate 1.

Abstract: A method of fabricating a semiconductor device having, for example, a memory cell array portion and a peripheral circuit portion is disclosed. By such a method, a first interlayer insulating film is formed on a semiconductor substrate, a first connection hole is formed by selectively removing a predetermined portion of the first interlayer insulating film, the sides of the first hole being substantially vertical to the bottom thereof, a first plug is formed by padding the first hole with a metallic film and, subsequently, a second interlayer insulating film is formed on the first insulating film, a second hole is formed by selectively removing a predetermined portion of the second interlayer insulating film, the sides of the second hole being substantially vertical to the bottom thereof, and a second plug aligned to be in direct connection with the first plug is formed by padding the second hole with the metallic film.

Abstract: A steplike offset between a memory cell array region and a peripheral circuit region, which is caused by a capacitor C, is reduced by an insulating film having a thickness substantially equal to the height of the capacitor C. Wiring or interconnection grooves are defined in the neighborhood of the surface of an insulating film whose surface is flattened by a CMP method. Further, connecting holes are defined in lower portions of the bottom faces of the interconnection grooves respectively. Second layer interconnections containing copper are formed within the interconnection grooves, and connecting portions containing copper are formed within the connecting holes. The second layer interconnections and first layer interconnections are connected to each other by the connecting portions whose lengths are shortened. The second layer interconnections and the connecting portions are integrally formed by a damascene method using the CMP method.

Abstract: A steplike offset between a memory cell array region and a peripheral circuit region, which is caused by a capacitor C, is reduced by an insulating film having a thickness substantially equal to the height of the capacitor C. Wiring or interconnection grooves are defined in the neighborhood of the surface of an insulating film whose surface is flattened by a CMP method. Further, connecting holes are defined in lower portions of the bottom faces of the interconnection grooves respectively. Second layer interconnections containing copper are formed within the interconnection grooves, and connecting portions containing copper are formed within the connecting holes. The second layer interconnections and first layer interconnections are connected to each other by the connecting portions whose lengths are shortened. The second layer interconnections and the connecting portions are integrally formed by a damascene method using the CMP method.

Abstract: A semiconductor integrated circuit device of the invention is provided with a memory cell array portion and a peripheral circuit portions. In the memory cell array portion, a plurality of plugs which penetrate each of a plurality of interlayer insulating films and the sides of which are almost vertical are directly connected in sequence. In the peripheral circuit portion, a plurality of plugs are mutually connected through contact pads for wiring.

Abstract: A method of manufacturing a semiconductor device is disclosed. After an insulating film having an opening is formed on a first thin tungsten film, an impurity is introduced into the substrate through the opening to form a punch-through stopper between a source and a drain. Then, on the first tungsten film inside the opening, a second tungsten film is selectively deposited to form a gate electrode. With this method, it is possible to easily fabricate high-speed MOSFETs whose channel length is less than half a micron.

Abstract: To improve the characteristics of oxides and other insulators formed by conventional techniques, particularly to improve its density, relative dielectric constant, resistance to acid, resistance to reduction and other characteristics, and to provide solid state devices or socharacteristics, the surfaces of the silicon oxide insulator, or the like, is irradiated with electrically neutral particles.

Abstract: A digital video signal processing apparatus for reducing the data rate of, and interpolating digital, video signals of a component format. The apparatus comprises a half-band high pass filter having a coefficient profile equivalent to that obtained by setting a center coefficient of an odd-order half-band low pass filter to zero, or a notch filter having a coefficient profile equivalent to that obtained by eliminating a center coefficient and even-numbered coefficients of such a low pass filter, and a delay line for giving a predetermined delay time to the signal supplied thereto, whereby the data rate of multiplexed or time-divided signals can be reduced, or the signals interpolated, in a relatively simple design employing a single digital filter.

Abstract: A boron doped amorphous silicon film is formed by CVD under the conditions of a pressure lower than 1 atm and a temperature higher than 200.degree. C. and lower than 400.degree. C. by using at least one of disilane and trisilane, and diborane as source gases. Since the resultant amorphous silicon film can diffuse impurities at a lower temperature than in the case of the polycrystalline silicon film formed by the conventional method, a pn junction much shallower than in the prior art can be formed.

Abstract: A digital video signal processing apparatus for reducing the data rate of, and interpolating digital, video signals of a component format. The apparatus comprises a half-band high pass filter having a coefficient profile equivalent to that obtained by setting a center coefficient of an odd-order half-band low pass filter to zero, or a notch filter having a coefficient profile equivalent to that obtained by eliminating a center coefficient and even-numbered coefficients of such a low pass filter, and a delay line for giving a predetermined delay time to the signal supplied thereto, whereby the data rate of multiplexed or time-divided signals can be reduced, or the signals interpolated, in a relatively simple design employing a single digital filter.

Abstract: In forming a metal or metal silicide film by CVD, a fluoro-silane is used as a reaction gas, or a fluoro-silane is added to a source gas. Examples of the metal halide used in the present invention include fluorides and chlorides of tungsten, molybdenum, titanium, tantalum and niobium. Among them, fluorides of tungsten and molybdenum are more desirable particularly from the viewpoint of the availability of the deposited metal or metal silicide. It is preferred that the source gases, i.e. silane series gas and metal halide, be diluted with a carrier gas such as nitrogen, hydrogen, helium or argon, and this is also true of the fluoro-silane. The total pressure is preferably 0.01 to 10 Torr. The reaction temperature is desirably 200.degree. to 800.degree. C., more desirably 300.degree. to 500.degree. C. Plasma CVD instead of thermal CVD may be employed for the purpose of lowering the reaction temperature.

Abstract: In forming a metal or metal silicide film by CVD, a fluorosilane is used as a reaction gas, or a fluoro-silane is added to a source gas. Examples of the metal halide used in the present invention include fluorides and chlorides of tungsten, molybdenum, titanium, tantalum and niobium. Among them, fluorides of tungsten and molybdenum are more desirable particularly from the viewpoint of the availability of the deposited metal or metal silicide. It is preferred that the source gases, i.e. silane series gas and metal halide, be diluted with a carrier gas such as nitrogen, hydrogen, helium or argon, and this is also true of the fluoro-silane. The total pressure is preferably 0.01 to 10 Torr. The reaction temperature is desirably 200.degree. to 800.degree. C., more desirably 300.degree. to 500.degree. C. Plasma CVD instead of thermal CVD may be employed for the purpose of lowering the reaction temperature.

Abstract: A superconducting material made of tungsten or molybdenum containing a specified amount of silicon, a wiring made of this superconducting material, and a semiconductor device using this wiring.The above-mentioned superconducting material undegoes no damage even in the steps of heat treatments effected after the formation of a wiring therefrom by virtue of its high melting point, and can be very easily patterned by reactive ion etching using SF.sub.6 as an etching gas, which has heretofore been generally employed. These features, in which conventional superconducting materials are lacking, allow the superconducting material of the present invention to exhibit excellent properties particularly when used in the wirings of a semiconductor device.

Abstract: A semiconductor device which is provided with an electrode and/or an interconnection made of a refractory metal film containing silicon oxide is disclosed. A refractory metal film containing silicon oxide has high capability of blocking penetration of ions and is suitable for being employed as a mask for forming a source and a drain of an MOS transistor by ion-implantation and as it has strong adhesion with an insulation film improves reliability of a semiconductor device.