Abstract: A semiconductor device includes a first chip, a second chip, a third chip, and a fourth chip. The first chip is placed adjacent to the second chip and the fourth chip. The third chip is placed adjacent to the second chip and the fourth chip at a position different from a position of the first chip. Data of the first chip is transferred from the first chip to the third chip via the second chip. Data of the third chip is transferred from the third chip to the first chip via the fourth chip. The data transferred from the first chip to the second chip is transferred via a wiring layer formed over a silicon and placed at a position different from positions of the first chip, the second chip, the third chip, and the fourth chip.

Abstract: A square secondary battery, including: a conductive container which is formed in a rectangular parallelepiped shape opened on one surface side; a lid which seals the one surface side of the container; a charge/discharge body which is housed in the container and which has electrodes respectively formed on both sides in a width direction; and an insulating member which coats the charge/discharge body and which insulates the charge/discharge body and the container from each other, wherein the insulating member is formed in a rectangular parallelepiped shape opened on one surface side and at least one side surface among a pair of side surfaces respectively opposing the electrodes of the charge/discharge body is folded in a direction of separation from the charge/discharge body along a height direction.

Abstract: A semiconductor device includes a first chip, a second chip, a third chip, a fourth chip, and a substrate. The first to fourth chips are mounted on the substrate. The first chip is placed adjacent to the second chip and the fourth chip. The third chip is placed adjacent to the second chip and the fourth chip at a position different from that of the first chip. The second chip has a first transferring circuit that transfers data from the first chip to the third chip, and the fourth chip has a second transferring circuit that transfers data from the third chip to the first chip.

Abstract: An operational support device sets an execution time of overfiring serving as an operation of a power generation facility at an output higher than a rated output. The device includes a life index value acquisition unit that acquires a life index value at a start time, the life index value being an index indicating a life of the power generation facility and changing in value in one direction with the output of the power generation facility; an output pattern setting unit that sets an output pattern per unit time of the power generation facility from the start time to a stop time based on the life index value such that the life index value reaches a predetermined value; and an overfiring setting unit that sets, based on the output pattern, a time in a period from the start to the stop time at which the overfiring is to be performed.

Abstract: Provided is a busbar capable of keeping a joint strength high at a joint between dissimilar metals. The busbar (2) joins terminals of a plurality of battery cells, the terminals each including a dissimilar metal. The busbar includes: a copper portion (2e) to be connected to a first terminal (in) of a first battery; an aluminum portion (2f) to be connected to a second terminal (1p) of a second battery; and a joint (2x) including the copper portion bonded to the aluminum portion. The aluminum portion is placed so as not to overlap the bonding region between the first terminal and the copper portion, and has arms (2f1) extending in a direction from the second terminal to the first terminal. The joint includes the copper portion bonded to the arms, and the arms have a width such that a proximal end portion is wider than a distal end portion of the arms.

Abstract: A plurality of stored data sequences that match one or more search data sequences are determined. Each of the stored data sequences of the plurality of stored data sequences comprise a plurality of data elements and the stored data sequences are stored in a content addressable memory array. A longest stored data sequence of the plurality of stored data sequences is determined using a plurality of tracing circuits. An address associated with the longest stored data sequence of the plurality of stored data sequences is determined. A count of data elements of the longest stored data sequence of the plurality of stored data sequences is determined.

Abstract: A fastening structure includes an insulation member disposed between a fastening member and a fastened member, and has a configuration wherein the insulation member is in close contact with the fastening member and the fastened member so that an adequate sealing area is secured. The fastening structure includes: a case; a fastening member extending through a through hole in the case; and an insulation member between the fastening member and the case. The fastening member includes a portion exposed from the case, and a penetrating portion extending through the through hole. The expose portion includes a confronting surface opposed to an outside surface of the case via the insulation member. A compression region is located, and defines a minimum distance between, the confronting surface and the outside surface. A projection is disposed at place not overlapping with the compression region.

Abstract: An operational support device sets an execution time of overfiring serving as an operation of a power generation facility at an output higher than a rated output. The device includes a life index value acquisition unit that acquires a life index value at a start time, the life index value being an index indicating a life of the power generation facility and changing in value in one direction with the output of the power generation facility; an output pattern setting unit that sets an output pattern per unit time of the power generation facility from the start time to a stop time based on the life index value such that the life index value reaches a predetermined value; and an overfiring setting unit that sets, based on the output pattern, a time in a period from the start to the stop time at which the overfiring is to be performed.

Abstract: An evaluating method includes: obtaining a calculation formula used for calculating a flexibility index indicating operational flexibility in response to a demand for electric power, while using, as variables, a plurality of types of reference parameters which are parameters regarding flexibility capabilities of a power generation facility having impact on the operational flexibility in response to the demand; obtaining a reference parameter value of each of the reference parameters with respect to a power generation facility subject to an evaluation; calculating the flexibility index of the power generation facility subject to the evaluation, by inputting the obtained reference parameter values to the calculation formula; and evaluating the operational flexibility of the power generation facility subject to the evaluation, based on the calculated flexibility index, wherein the calculation formula is set such that weights applied with respect to the flexibility index are different in correspondence with the t

Abstract: A terminal fitting (10) is a press-formed product of a metal plate and includes a tab portion (11). The tab portion (11) includes a contact portion (21) on at least one of two surfaces facing opposite sides in a plate thickness direction that comes into contact with a mating terminal fitting, and includes a press recess (22) on at least one of two surfaces facing opposite sides in a plate width direction that increases a plate thickness.

Abstract: A semiconductor device includes a first chip, a second chip, a third chip, a fourth chip, and a substrate. The first to fourth chips are mounted on the substrate. The first chip is placed adjacent to the second chip and the fourth chip. The third chip is placed adjacent to the second chip and the fourth chip at a position different from that of the first chip. The second chip has a first transferring circuit that transfers data from the first chip to the third chip, and the fourth chip has a second transferring circuit that transfers data from the third chip to the first chip.

Abstract: A cover member for an elbow rest of a chair includes a mounting portion to be disposed along an upper surface of the elbow rest, and a concealing portion for covering a side portion of the elbow rest. The mounting portion is to be hooked and stopped on the elbow rest.

Abstract: [Problem] To present a cover member of a lap cover of a chair and a chair having such member capable of solving the problems due to the space formed between the lap cover and the seat and problems occurring when the lap cover is used. [Solving Means] A configuration comprising a mounting portion 11 formed along the top surface of a lap cover 31 as being hooked and stopped on the lap cover 31 of a chair 3, a concealing portion 12 for covering the side portion of the lap cover, and a lap cover portion 2 using a sheet material so as to wrap the lap portion in a state sitting on the chair 3, in which the sheet material of the lap cover 2 is integrated with the mounting portion 11 or concealing portion 12.

Abstract: A plurality of stored data sequences that match one or more search data sequences are determined. Each of the stored data sequences of the plurality of stored data sequences comprise a plurality of data elements and the stored data sequences are stored in a content addressable memory array. A longest stored data sequence of the plurality of stored data sequences is determined using a plurality of tracing circuits. An address associated with the longest stored data sequence of the plurality of stored data sequences is determined. A count of data elements of the longest stored data sequence of the plurality of stored data sequences is determined.

Abstract: A technique for register mapping in a virtual system includes preparing a register pool that includes a plurality of registers for mapping. A mapping table is prepared that has a register identifier (ID) and information related to each of a plurality of parameters that express an operational state of the virtual system for each of the registers. At the time a register access request is issued by a hardware thread, the register ID for an access target and information related to each of the plurality of parameters that express the operational state during operation is acquired. One of the registers, for which the acquired register ID and information related to each of the plurality of parameters match the register ID and information for each of the plurality of parameters within the mapping table, is set as a mapped register to be accessed per the register access request.

Abstract: A technique for register mapping in a virtual system includes preparing a register pool that includes a plurality of registers for mapping. A mapping table is prepared that has a register identifier (ID) and information related to each of a plurality of parameters that express an operational state of the virtual system for each of the registers. At the time a register access request is issued by a hardware thread, the register ID for an access target and information related to each of the plurality of parameters that express the operational state during operation is acquired. One of the registers, for which the acquired register ID and information related to each of the plurality of parameters match the register ID and information for each of the plurality of parameters within the mapping table, is set as a mapped register to be accessed per the register access request.

Abstract: A plurality of stored data sequences that match one or more search data sequences are determined. Each of the stored data sequences of the plurality of stored data sequences comprise a plurality of data elements and the stored data sequences are stored in a content addressable memory array. A longest stored data sequence of the plurality of stored data sequences is determined using a plurality of tracing circuits. An address associated with the longest stored data sequence of the plurality of stored data sequences is determined. A count of data elements of the longest stored data sequence of the plurality of stored data sequences is determined.

Abstract: [Problem] To present a padded seat for a chair capable of solving conventional problems such as cooling of the body, disclosure of the clothes of the seat occupant, necessity of paying attention to the state of the clothes, and disturbance of the elbow part when the chair is stored in the space beneath the desk. [Solving Means] This is a padded seat used as being installed in a chair, that is, a padded seat having elbow parts 12 provided at both sides of a seat part 11, and it is furnished with a lifting and retaining mechanism 2 for maintaining selectively between a state of retaining the elbow part 12 at the inner side along the surface of the seat part 11, and an upright state.

Abstract: In an embodiment, a sensor unit has a pixel region portion including a plurality of pixels two-dimensionally disposed in rows and columns, a timing generator configured to control exposure times for the plurality of rows so that the exposure times for the pixels are varied with respect to the rows, a comparator configured to make a comparison between a reference value and an integrated value of pixel data on each row on which the exposure times are controlled, and a register configured to hold exposure time information on the row at a match point at which a match occurs between the integrated value and the reference value as a result of the comparison.

Abstract: Data is compressed using content addressable memory without disruption despite error using a plurality of content addressable memories to detect sequentially repeating data elements of the data. Compression information is generated for each sequence of repeating data elements that repeat for at least a compression threshold without any one of the plurality of content addressable memories generating an indication of an error for a matching content addressable memory entry. Individual data elements are output for each of the data elements that do not repeat for the compression threshold. Compression information is generated for each sequence of repeating data elements that repeat for at least the compression threshold and then generating a currently searched data element that matches the repeating data elements when any one of the plurality of content addressable memories generates an indication of an error for a content addressable memory entry that matches the currently searched data element.