Patents by Inventor Nobuyuki Ito
Nobuyuki Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170256635Abstract: In a nitride semiconductor including a Si substrate and a nitride semiconductor stacked body disposed on the Si substrate, the half value width of an X-ray diffraction rocking curve of the Si substrate is less than 160 arcsec.Type: ApplicationFiled: June 3, 2015Publication date: September 7, 2017Applicant: SHARP KABUSHIKI KAISHAInventors: Atsushi OGAWA, Manabu TOHSAKI, Mai OKAZAKI, Yohsuke FUJISHIGE, Masayuki TAJIRI, Nobuyuki ITO
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Patent number: 9660068Abstract: According to this GaN-based HFET, resistivity ? of a semi-insulating film forming a gate insulating film is 3.9×109?cm. The value of this resistivity ? is a value derived when the current density is 6.25×10?4 (A/cm2). By inclusion of the gate insulating film by a semi-insulating film having a resistivity ?=3.9×109?cm, a withstand voltage of 1000 V can be obtained. Meanwhile, the withstand voltage abruptly drops as the resistivity of the gate insulating film exceeds 1 ×1011?cm, and the gate leak current increases when the resistivity of the gate insulating film drops below 1 ×107?cm.Type: GrantFiled: September 1, 2014Date of Patent: May 23, 2017Assignee: SHARP KABUSHIKI KAISHAInventors: Yushi Inoue, Atsushi Ogawa, Nobuyuki Ito, Nobuaki Teraguchi
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Publication number: 20170141187Abstract: A nitride compound semiconductor has a substrate and a nitride compound semiconductor stack on the substrate. The nitride compound semiconductor stack includes a multilayer buffer layer, a channel layer on this multilayer buffer layer, and an electron supply layer on this channel layer. A recess extends from the surface of the electron supply layer through the channel layer and the multilayer buffer layer. A heat dissipation layer in this recess is contiguous to the multilayer buffer layer and the channel layer and has a higher thermal conductivity than the multilayer buffer layer.Type: ApplicationFiled: April 17, 2015Publication date: May 18, 2017Applicant: SHARP KABUSHIKI KAISHAInventors: Nobuyuki ITO, Manabu TOHSAKI, Atsushi OGAWA
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Patent number: 9555547Abstract: A robotic system may include an incremental encoder coupled to a joint of the system. The robotic system may include a memory configured to store representations of angular positions of the joint. The robotic system may include a motor coupled to the joint, where rotation of the joint while the motor is powered off (i) causes rotation of the motor such that electric power is generated, and (ii) updates the angular position of the joint. The robotic system may use the electric power to power on the incremental encoder and the memory while the robotic system is powered off. One or more processors may obtain, when the robotic system powers on after being powered off, the updated angular position of the joint from the memory, where the incremental encoder provides the updated angular position to the memory while the robotic system is powered off.Type: GrantFiled: January 7, 2016Date of Patent: January 31, 2017Assignee: X Development LLCInventors: Nobuyuki Ito, Junichi Urata, Koichi Nishiwaki
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Patent number: 9545720Abstract: The present application discloses implementations that involve shutdowns of a robotic system. An example may include controlling, by a robotic system, a plurality of motors of the robotic system with a central processing unit (CPU). The example may also include determining, by the robotic system, an error condition of the robotic system, where the error condition prevents the CPU from controlling at least one of the plurality of motors. The example may also include causing a plurality of motor driver boards to control the plurality of motors of the robotic system in response to determining the error condition of the robotic system. The example may also include receiving, by the plurality of motors, one or more commands from the plurality of motor driver boards to move the robotic system to a stationary position and park the robotic system in the stationary position.Type: GrantFiled: February 1, 2016Date of Patent: January 17, 2017Assignee: X Development LLCInventors: Nobuyuki Ito, Junichi Urata
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Publication number: 20160329419Abstract: A nitride semiconductor layered body includes a Si substrate having a surface, as the principal surface, inclined at an off-angle of 0 degrees or more and 4.0 degrees or less with respect to a plane and a nitride semiconductor layer disposed on the Si substrate.Type: ApplicationFiled: January 6, 2015Publication date: November 10, 2016Applicant: SHARP KABUSHIKI KAISHAInventors: Atsushi OGAWA, Manabu TOHSAKI, Yohsuke FUJISHIGE, Nobuyuki ITO, Mai OKAZAKI, Yushi INOUE, Masayuki TAJIRI, Nobuaki TERAGUCHI
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Publication number: 20160254378Abstract: According to this GaN-based HFET, resistivity ? of a semi-insulating film forming a gate insulating film is 3.9×109 ?cm. The value of this resistivity ? is a value derived when the current density is 6.25×10?4 (A/cm2). By inclusion of the gate insulating film by a semi-insulating film having a resistivity ?=3.9×109 ?cm, a withstand voltage of 1000 V can be obtained. Meanwhile, the withstand voltage abruptly drops as the resistivity of the gate insulating film exceeds 1×1011 ?cm, and the gate leak current increases when the resistivity of the gate insulating film drops below 1×107 ?cm.Type: ApplicationFiled: September 1, 2014Publication date: September 1, 2016Applicant: SHARP KABUSHIKI KAISHAInventors: Yushi INOUE, Atsushi OGAWA, Nobuyuki ITO, Nobuaki TERAGUCHI
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Patent number: 9280159Abstract: The present application discloses implementations that involve shutdowns of a robotic system. An example may include controlling, by a robotic system, a plurality of motors of the robotic system with a central processing unit (CPU). The example may also include determining, by the robotic system, an error condition of the robotic system, where the error condition prevents the CPU from controlling at least one of the plurality of motors. The example may also include causing a plurality of motor driver boards to control the plurality of motors of the robotic system in response to determining the error condition of the robotic system. The example may also include receiving, by the plurality of motors, one or more commands from the plurality of motor driver boards to move the robotic system to a stationary position and park the robotic system in the stationary position.Type: GrantFiled: May 4, 2015Date of Patent: March 8, 2016Assignee: Google Inc.Inventors: Nobuyuki Ito, Junichi Urata
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Patent number: 9261893Abstract: A robotic system may include an incremental encoder coupled to a joint of the system. The robotic system may include a memory configured to store representations of angular positions of the joint. The robotic system may include a motor coupled to the joint, where rotation of the joint while the motor is powered off (i) causes rotation of the motor such that electric power is generated, and (ii) updates the angular position of the joint. The robotic system may use the electric power to power on the incremental encoder and the memory while the robotic system is powered off. One or more processors may obtain, when the robotic system powers on after being powered off, the updated angular position of the joint from the memory, where the incremental encoder provides the updated angular position to the memory while the robotic system is powered off.Type: GrantFiled: September 17, 2014Date of Patent: February 16, 2016Assignee: Google Inc.Inventors: Nobuyuki Ito, Junichi Urata, Koichi Nishiwaki
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Patent number: 9180717Abstract: The present invention relates to a vinyl chloride resin latex for a thermal sublimation transfer image-receiving sheet, comprising a vinyl chloride homopolymer and an alkylbenzenesulfonate salt in an amount of more than 1 part by weight to 5 parts by weight per 100 parts by weight of the vinyl chloride homopolymer; and a thermal sublimation transfer image-receiving sheet using the same.Type: GrantFiled: October 18, 2011Date of Patent: November 10, 2015Assignee: TOSOH CORPORATIONInventors: Nobuyuki Ito, Tamotsu Sato, Kazunori Watanabe
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Patent number: 9111839Abstract: An epitaxial wafer for a heterojunction type FET includes an AlN primary layer, a stepwisely composition-graded buffer layer structure, a superlattice buffer layer structure, a GaN channel layer, and a nitride semiconductor electron supply layer, which are sequentially provided on a Si substrate, the stepwisely composition-graded buffer layer structure including a plurality of AlGaN buffer layers provided on each other such that an Al composition ratio is sequentially reduced, an uppermost layer thereof having a composition of AlxGa1?xN (0<x), a plurality of sets of an AlyGa1?yN (y?1) superlattice constituting layer and an AlzGa1?zN (0<z<y) superlattice constituting layer being provided on each other alternately starting from one of the AlyGa1?yN superlattice constituting layer and the AlzGa1?zN superlattice constituting layer in the superlattice buffer layer structure, the AlxGa1?xN buffer layer and the AlzGa1?zN superlattice constituting layer satisfying x?0.05?z?x+0.05.Type: GrantFiled: January 15, 2013Date of Patent: August 18, 2015Assignee: SHARP KABUSHIKI KAISHAInventors: Masayuki Hoteida, Nobuaki Teraguchi, Daisuke Honda, Nobuyuki Ito, Masakazu Matsubayashi, Haruhiko Matsukasa
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Publication number: 20150069407Abstract: A group III nitride semiconductor multilayer substrate (100) includes a channel layer (5) which is a group III nitride semiconductor, a barrier layer (6) which is formed on the channel layer (5) to form a heterointerface in combination with the channel layer (5) and which is a group III nitride semiconductor, wherein in the barrier layer (6, 206), a Cu concentration in a region of 10 nm or less depths from its surface is 1.0×1010 (atomicity/cm2) or less.Type: ApplicationFiled: April 19, 2013Publication date: March 12, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Masakazu Matsubayashi, Nobuaki Teraguchi, Nobuyuki Ito
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Publication number: 20140353587Abstract: An epitaxial wafer for a heterojunction type FET includes an AlN primary layer, a stepwisely composition-graded buffer layer structure, a superlattice buffer layer structure, a GaN channel layer, and a nitride semiconductor electron supply layer, which are sequentially provided on a Si substrate, the stepwisely composition-graded buffer layer structure including a plurality of AlGaN buffer layers provided on each other such that an Al composition ratio is sequentially reduced, an uppermost layer thereof having a composition of AlxGa1—xN (0<x), a plurality of sets of an AlyGa1?yN (y?1) superlattice constituting layer and an AlzGa1?zN (0<z<y) superlattice constituting layer being provided on each other alternately starting from one of the AlyGa1?yN superlattice constituting layer and the AlzGa1?zN superlattice constituting layer in the superlattice buffer layer structure, the AlxGa1?xN buffer layer and the AlzGa1?zN superlattice constituting layer satisfying x?0.05?z?x+0.05.Type: ApplicationFiled: January 15, 2013Publication date: December 4, 2014Inventors: Masayuki Hoteida, Nobuaki Teraguchi, Daisuke Honda, Nobuyuki Ito, Masakazu Matsubayashi, Haruhiko Matsukasa
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Patent number: 8723224Abstract: One embodiment of a semiconductor device according to the present invention includes a substrate, a base compound semiconductor layer layered on the substrate to form a base, a channel defining compound semiconductor layer layered on the base compound semiconductor layer to define a channel, and an impact ionization control layer that is layered within a layering range of the base compound semiconductor layer and controls the location of impact ionization, wherein the base compound semiconductor layer is formed of a first compound semiconductor, the channel defining compound semiconductor layer is formed of a second compound semiconductor, and the impact ionization control layer is formed of a third compound semiconductor that has a smaller band gap than the first compound semiconductor.Type: GrantFiled: September 14, 2012Date of Patent: May 13, 2014Assignee: Sharp Kabushiki KaishaInventors: Nobuyuki Ito, John Kevin Twynam
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Publication number: 20130281621Abstract: The present invention relates to a vinyl chloride-based copolymer latex comprising 0.20 to 10.0 parts by weight of an organic compound having a sulfonate or sulfuric acid ester salt and from 0.05 to 3.0 parts by weight of a higher fatty acid salt, per 100 parts by weight of a vinyl chloride-vinyl carboxylate ester copolymer or 100 parts by weight of a vinyl chloride-unsaturated carboxylic acid ester copolymer, wherein the vinyl chloride-based copolymer latex has pH of from 3 to 8; and a production method thereof.Type: ApplicationFiled: December 16, 2011Publication date: October 24, 2013Applicant: TOSCH CORPORATIONInventors: Nobuyuki Ito, Tamotsu Sato, Kazunori Watanabe
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Publication number: 20130202819Abstract: The present invention relates to a vinyl chloride resin latex for a thermal sublimation transfer image-receiving sheet, comprising a vinyl chloride homopolymer and an alkylbenzenesulfonate salt in an amount of more than 1 part by weight to 5 parts by weight per 100 parts by weight of the vinyl chloride homopolymer; and a thermal sublimation transfer image-receiving sheet using the same.Type: ApplicationFiled: October 18, 2011Publication date: August 8, 2013Applicant: TOSOH CORPORATIONInventors: Nobuyuki Ito, Tamotsu Sato, Kazunori Watanabe
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Patent number: 8460046Abstract: The object of the invention is to provide a highly reliable organic functional element such as an organic EL element or an organic semiconductor element exemplified by an organic TFT element which can be manufactured without requiring a vapor deposition process for forming an electrode on an organic material layer. Consequently, such an organic functional element can be large-sized easily and produced at lower cost. In addition, no damage is caused to the organic material layer during formation of the electrode, and the organic functional element is not affected by environmental changes. Also disclosed is a method for manufacturing such an organic functional element. To attain the above-mentioned object, the present invention provides an organic functional element comprising at least a plurality of electrodes and an organic material layer which is characterized in that at least one of the electrodes is composed of a metal having a melting point not higher than a temperature that is higher by 30° C.Type: GrantFiled: October 20, 2010Date of Patent: June 11, 2013Assignee: Dai Nippon Printing Co., Ltd.Inventor: Nobuyuki Ito
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Publication number: 20130020581Abstract: An epitaxial wafer including nitride-based semiconductor layers usable for a hetero-junction field effect type transistor, includes a first buffer layer of AlN or AlON, a second buffer layer of AlxGa1-xN having its Al composition ratios decreased in a stepwise fashion, a third buffer layer including a multilayer of repeatedly stacked AlaGa1-aN layers/AlbGa1-bN layers disposed on the second buffer layer, a GaN channel layer, and an electron supply layer in this order on a Si substrate, wherein the Al composition ratio x in the uppermost part of the second buffer layer is in a range of 0?x?0.3.Type: ApplicationFiled: July 12, 2012Publication date: January 24, 2013Applicant: Sharp Kabushiki KaishaInventors: Nobuaki TERAGUCHI, Daisuke Honda, Nobuyuki Ito, Motoji Yagura
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Publication number: 20130018115Abstract: Provided is a method for recovering a polycarbonate resin from a discarded optical disk and/or a recovered optical disk, which has a polycarbonate resin substrate. The following process steps (I) and (II) are applied to a chemically treated product, which is obtained by crushing a discarded optical disk and/or a recovered optical disk, and chemically treating the resulting crushed product. Process step (I): a step containing (a) removing a magnetic metal foreign matter with a magnet, and (b) identifying a colored foreign matter with an optical camera, and removing the colored foreign matter. Process step (II): a step containing detecting the presence of a metal foreign matter with a metal foreign matter detector, and removing a resin containing the metal foreign matter.Type: ApplicationFiled: December 24, 2010Publication date: January 17, 2013Applicants: PANAC INDUSTRIES, INC., IDEMITSU KOSAN CO., LTD.Inventors: Toshio Isozaki, Kenichi Mitsuhashi, Nobuyuki Ito
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Publication number: 20130009166Abstract: One embodiment of a semiconductor device according to the present invention includes a substrate, a base compound semiconductor layer layered on the substrate to form a base, a channel defining compound semiconductor layer layered on the base compound semiconductor layer to define a channel, and an impact ionization control layer that is layered within a layering range of the base compound semiconductor layer and controls the location of impact ionization, wherein the base compound semiconductor layer is formed of a first compound semiconductor, the channel defining compound semiconductor layer is formed of a second compound semiconductor, and the impact ionization control layer is formed of a third compound semiconductor that has a smaller band gap than the first compound semiconductor.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Inventors: Nobuyuki ITO, John Kevin Twynam