Abstract: One example disclosed in the application is an electronic data-storage device comprising one or more arrays of memory elements. The data-storage device also includes an error-control-coding encoder that encodes received data and a READ/WRITE controller that writes encoded data received from the error-control-coding encoder to a number of memory elements by applying the switching-inducing force or gradient to the one or more arrays of memory elements until more than a maximum-allowed number of WRITE requests have been queued to the WRITE-request buffer, until feedback signals indicate that the WRITE operation has completed, or until the switching-inducing force or gradient has been applied for a maximum application time.

Abstract: A method of storing data in a memory array with less than half of memory elements in any row and column in a low-resistance state. The data are arranged in a first portion of an encoding array. High-resistance values are entered in a second portion. A codeword is selected from a covering code for each row in which too many entries have low-resistance values. The selected codeword is used to reduce the number of low-resistance values in that row. A codeword is selected for each column in which too many entries have low-resistance values and the codeword is used to reduce the number of such values in that column. The process is repeated until no row and no column has too many low-resistance values. The array entries are stored in corresponding memory elements.

Abstract: Examples of the present invention include an electronic-memory-system component. The electronic-memory-system component includes an array of data-storage elements and an encoder that receives input data, processes the input data as a two-dimensional array of bits by carrying out two passes, in one pass subjecting a portion of each row of the two-dimensional array of bits having more than a threshold weight to a first weight-reduction operation, and, in another pass, subjecting a portion of each considered column of the two-dimensional array of bits having more than a threshold weight to a second weight-reduction operation, one of the first and second weight-reduction operations employing an antipodal mapping and the other of the first and second weight-reduction operations employing bit inversion, generates a codeword corresponding to the input data, and stores the codeword in the array of data-storage elements.

Abstract: A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells.

Abstract: Methods of treating patients with SNDX-275 are provided.

Abstract: A method for data storage includes encoding each of multiple data items individually using a first Error Correction Code (ECC) to produce respective encoded data items. The encoded data items are stored in a memory. The multiple data items are encoded jointly using a second ECC, so as to produce a code word of the second ECC, and only a part of the code word is stored in the memory. The stored encoded data items are recalled from the memory and the first ECC is decoded in order to reconstruct the data items. Upon a failure to reconstruct a given data item from a respective given encoded data item by decoding the first ECC, the given data item is reconstructed based on the part of the code word of the second ECC and on the encoded data items other than the given encoded data item.

Abstract: A multi-state memory system with encoding that minimizes half-select currents. The system includes an array of row and column conductors with a plurality of storage cells each capable of being placed into any of three or more physical states. An encoder is connected to receive data bits for storage and to apply activation signals to the row and column conductors to write information to the storage cells. The encoder is programmed to encode the data bits into entries in an array having one row corresponding with each row conductor and one column corresponding with each column conductor; select entries in the array according to half-select currents of the storage cells; apply a predetermined one-dimensional mapping that increases the value of at most one entry in the array to obtain a mapped array; and write entries of the mapped array into the storage cells.

Abstract: A data storage system including a memory array including a plurality of memory devices programmable in greater than two states. A read/write control module may overwrite data in the memory array without violating a constraint during the overwrite process. The memory array may be an m×n memory array.

Abstract: An optical data bus transceiver (110), optical data bus system (100) and method (300) employ a disambiguation signal to resolve bit ambiguities in a summation signal on an optical data bus (104). The optical data bus transceiver includes a transmitter (112) connected to the optical bus and configured, in conjunction with another transmitter (112?, 120), to produce on the optical bus the summation signal during a first interval and the disambiguation signal during a second interval. The optical data bus transceiver further includes a receiver (114) configured to receive (310) the summation signal. The summation signal includes a summation of separate data signals from each of the transceiver transmitter (112) and the other transmitter (112?, 120). The disambiguation signal includes information to resolve bit ambiguities in the summation signal. A bit ambiguity results from a summation of data bits in each of the respective data signals during a symbol period of the first interval.

Abstract: A method for data storage includes encoding each of multiple data items individually using a first Error Correction Code (ECC) to produce respective encoded data items. The encoded data items are stored in a memory. The multiple data items are encoded jointly using a second ECC, so as to produce a code word of the second ECC, and only a part of the code word is stored in the memory. The stored encoded data items are recalled from the memory and the first ECC is decoded in order to reconstruct the data items. Upon a failure to reconstruct a given data item from a respective given encoded data item by decoding the first ECC, the given data item is reconstructed based on the part of the code word of the second ECC and on the encoded data items other than the given encoded data item.

Abstract: Novel compositions and methods of using substituted pyrimidines which have the general formula: (I).

Abstract: A technology is provided for compressing digital discrete node data to reduce overall power consumption. Node data can be represented by a plurality of data units with a specified data width and can also be viewed as a plurality of bit planes corresponding to data at each bit position for the data units. A threshold bit position value may be selected for data units using an achievable compressibility estimate relative to an estimated energy consumption. The threshold bit position value can represent a boundary where an estimated energy consumption for compressing and transmitting a bit plane is less than an estimated energy consumption for transmitting the bit plane uncompressed. A bit plane is selected in the plurality of bit planes with a bit position value greater than the threshold bit position value. The bit plane is compressed using a compressor in the networked node.

Abstract: A method for rewriting a memory array (408) with a number of memory elements (206) includes performing a rewrite process to change the memory array (408) from an initial state to a target state in a manner that avoids violating to a set of weight constraints at any time during the rewrite process. A memory system includes a memory array (408) and a memory controller (104) configured to perform a rewrite process to change the memory array (408) from an initial state to a target state in a manner that avoids violating a set of weight constraints at any time during the rewrite process.

Abstract: A first node in a wireless network transmits a periodic pilot signal to a second node. The second node receives the periodic pilot signal and retransmits the signal back to the first node. The retransmitted pilot signal includes a phase adjustment in view of an internal processing delay at the second node. The phase adjustment involves matching a phase of the retransmitted pilot signal to a phase of the received pilot signal. The first node measures a roundtrip delay of the pilot signal and the distance between the nodes is computed based at least on the measured roundtrip delay.

Abstract: One embodiment of the present invention is directed to an adaptive context-based predictor that predicts a value {circumflex over (x)} from a context, stored in an electronic memory, corresponding to a noisy-dataset symbol zi of a noisy dataset corrupted with noise modeled as being introduced by a noise-introducing channel. The adaptive context-based predictor is adapted according to one or more parameters that specify adaptive context-based-predictor operation, at least one of which functionally depends, or partially functionally depends, on a level of noise represented by the noise-introducing channel. The adaptive context-based predictor computes a number of intermediate values from the context, computes the predicted value {circumflex over (x)} from the intermediate values, and stores the predicted value {circumflex over (x)} in the electronic memory.

Abstract: A data storage system including a memory array including a plurality of memory devices programmable in greater than two states. A memory control module may control operations of the memory array, and an encoder module may encode input data for storing to the memory array. The memory array may be an m×n memory array, and the memory control module may control operations of storing data to and retrieving data from the memory array.

Abstract: A data storage system including a memory array including a plurality of memory devices programmable in greater than two states. A read/write control module may overwrite data in the memory array without violating a constraint during the overwrite process. The memory array may be an m×n memory array.

Abstract: A method of storing data into a memory array converts an input string into a first binary array with (m?1) rows and (n?1) columns. A second binary array with m rows and n columns in an encoded bit pattern is then generated from the first binary array. The second binary array in the encoded bit pattern has at most n/2 1's in each row and at most m/2 1's in each column, and the m-th row and an n-th column contain information for decoding other entries of the second binary array. The encoded bit pattern of the second binary array is then stored into corresponding memory devices of the memory array.

Abstract: A method for encoding data to be placed into a weight constrained memory array includes designating a set of crosspoints within a crossbar memory array as indicator crosspoints and a set of crosspoints within the memory array as data crosspoints, the set of indicator crosspoints selected so that a net number of times that each data crosspoint has been flipped can be determined from a subset of the set of indicator crosspoints, placing an input stream of data into a matrix corresponding to crosspoints within the memory array, bits of the input stream being placed into matrix elements that correspond to data crosspoints of the memory array, setting each matrix element corresponding to indicator crosspoints to a value corresponding to a fixed resistive state, and flipping each bit corresponding to a conductor of the memory array until no conductors within the memory array violate a weight constraint.

Abstract: Method and system embodiments of the present invention are directed to encoding information in ways that are compatible with constraints associated with electrical-resistance-based memories and useful in other, similarly constrained applications, and to decoding the encoded information. One embodiment of the present invention encodes k information bits and writes the encoded k information bits to an electronic memory, the method comprising systematically encoding the k information bits to produce a vector codeword, with additional parity bits so that the codeword is resilient to bit-transition errors that may occur during storage of the codeword in, and retrieval of the codeword from, the electronic memory, ensuring that the codeword does not violate a weight constraint, and writing the codeword to the electronic memory.