Patents by Inventor Osamu Wada

Osamu Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7505300
    Abstract: A nonvolatile semiconductor memory device includes a nonvolatile storage element to which data is inhibited from being rewritten, a read operation control circuit which captures a read operation instruction signal in synchronization with an external input clock, and a write operation control circuit to which a write operation instruction signal is input asynchronously with the external input clock. The read operation instruction signal gives an instruction to start a read operation to read data out of the nonvolatile storage element, and the write operation instruction signal gives an instruction to start a write operation to write data to the nonvolatile storage element. The device further includes a reset circuit which resets an operation of the read operation control circuit upon receiving the write operation instruction signal.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: March 17, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshimasa Namekawa, Hiroshi Ito, Hiroaki Nakano, Osamu Wada, Atsushi Nakayama
  • Publication number: 20090052102
    Abstract: A semiconductor device comprises a protection circuit for protecting a semiconductor integrated circuit. The protection circuit includes a first terminal supplied with a first voltage, a second terminal supplied with a second voltage lower than the first voltage, a first thyristor arranged between the first terminal and the second terminal, and a trigger circuit operative to break a current path for trigger current flowing in the first gate of the first thyristor when the first voltage is applied to the first terminal, thereby disabling the first thyristor to become conductive, and operative to form the current path for trigger current when a voltage other than the first voltage is applied to the first terminal, thereby enabling the first thyristor to become conductive.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 26, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Osamu WADA
  • Patent number: 7484855
    Abstract: A projector including: an adjustment section which generates edit image information for projecting an edit image including a content image based on input image information and a position change detection image at least partially provided outside the content image; a sensing section which senses a screen onto which the edit image is projected and generates sensing information indicating a sensed image; a projection section which projects the edit image based on the edit image information; and a determination section which determines whether or not a relative position between the projection section and the screen has changed based on the sensing information.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: February 3, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Masanobu Kobayashi, Hideki Matsuda, Osamu Wada
  • Publication number: 20090027973
    Abstract: A non-volatile semiconductor storage device includes: one or more memory cells including anti-fuse elements capable of writing data by breaking down a gate insulation film of a MOS transistor with a high voltage; a sense node having its one end connected to each of the anti-fuse elements; a sense amplifier comparing the potential of the sense node with the reference potential and amplifying the difference therebetween, the sense amplifier being activated according to a sense-amplifier activation signal; an initialization circuit initializing the potential of the sense node according to an initialization signal; a control circuit outputting the initialization signal at a predetermined timing after input of an external signal input from the outside and outputting a first activation signal to activate the sense amplifier at a predetermined timing after input of the external signal; and a switching circuit outputting the first activation signal as the sense-amplifier activation signal when a normal data read oper
    Type: Application
    Filed: February 15, 2008
    Publication date: January 29, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Nakayama, Toshimasa Namekawa, Hiroaki Nakano, Hiroshi Ito, Osamu Wada
  • Publication number: 20080237673
    Abstract: A semiconductor device comprising: a first well region which is formed at a surface portion of a semiconductor substrate and to which a first voltage is applied; a gate insulating film which is formed on the first well region; a gate electrode which is formed on the gate insulating film and has a polarity different from a polarity of the first well region and to which a second voltage is applied; and an element isolating region which is formed at a surface portion of the first well region to surround a region within the first well region that is opposed to the gate insulating film, wherein a capacitance is formed between the region within the first well region surrounded by the element isolating region and the gate electrode.
    Type: Application
    Filed: September 28, 2007
    Publication date: October 2, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Osamu Wada, Toshimasa Namekawa
  • Publication number: 20080204364
    Abstract: The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.
    Type: Application
    Filed: December 28, 2007
    Publication date: August 28, 2008
    Applicant: Seiko Epson Corporation
    Inventors: Osamu Wada, Junichi Nakamura
  • Publication number: 20080204365
    Abstract: The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.
    Type: Application
    Filed: April 25, 2008
    Publication date: August 28, 2008
    Applicant: Seiko Epson Corporation
    Inventors: Osamu Wada, Junichi Nakamura
  • Patent number: 7388770
    Abstract: A nonvolatile semiconductor memory device includes a storage element which is programmed with information by breaking an insulating film by application of electrical stress to the storage element, a control switch which controls the application of electrical stress to the storage element, and a control circuit which controls conduction/nonconduction of the control switch. The device further includes a power supply circuit including a voltage generation circuit which generates a first voltage to cause the electrical stress in program operation, a sensing circuit which senses that the insulating film is broken down, and a counter circuit which controls the control circuit to interrupt the application of electrical stress to the storage element when a given period of time elapses after the sensing circuit senses that the insulating film is broken down.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: June 17, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshimasa Namekawa, Hiroaki Nakano, Hiroshi Ito, Atsushi Nakayama, Osamu Wada
  • Patent number: 7382680
    Abstract: A semiconductor integrated circuit device includes a storage unit arranged on a semiconductor chip to store a plurality of data, and a plurality of registers provided on the semiconductor chip, the registers storing the data transferred from the storage unit, respectively. The storage unit has a nonvolatile memory element section and a volatile memory element section. The nonvolatile memory element section includes an address area which stores identification information of the registers as addresses and a data area which stores the data to correspond to the addresses by varying electrical characteristics irreversibly. The volatile memory element section temporarily stores the data read from the nonvolatile memory element section.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: June 3, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroaki Nakano, Toshimasa Namekawa, Osamu Wada, Hiroshi Ito, Atsushi Nakayama
  • Publication number: 20080094898
    Abstract: A memory cell array includes a plurality of non-volatile semiconductor memory elements, each memory element storing data in a non-volatile manner. A shift register stores data read from the semiconductor memory element and sequentially transfers the data outside, the shift register also stores data transferred from outside and stores the data in the semiconductor memory element. A syndrome generation circuit is connected to an output terminal of the shift register, the syndrome generation circuit generating syndrome of data output from the output terminal. An error-correction circuit uses the data and the syndrome to correct an error of the data.
    Type: Application
    Filed: October 15, 2007
    Publication date: April 24, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroaki Nakano, Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Atsushi Nakayama
  • Publication number: 20080080295
    Abstract: A semiconductor memory device includes a precharge unit to precharge a reference bit line and a selection bit line with the same potential, the selection bit line being connected to a target nonvolatile storage element from which data is to be read, a charge extraction unit to extract charges from the reference bit line and the selection bit line with the same current characteristic, a recharge unit which recharges the reference bit line with a current that is smaller than the charges extracted by the charge extraction unit, and a plurality of differential amplifiers which compare a potential of the reference bit line and a potential of the selection bit line with a reference potential. The semiconductor memory device further includes an output circuit which outputs data from the target nonvolatile storage element connected to the selection bit line, based on outputs of the differential amplifiers.
    Type: Application
    Filed: August 2, 2007
    Publication date: April 3, 2008
    Inventors: Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Atsushi Nakayama, Hiroaki Nakano
  • Patent number: 7345692
    Abstract: To provide an environment-compliant image display system, image processing method, and information storage medium that enable correction of images within a shorter time, a Y value of color signals (Y3, x3, y3) measured by a color light sensor 60 and converted by an Y3x3y3 conversion section 143 is replaced with Y1, which is a Y value of an ideal environment, by a Y replacing section 142; color difference between the replaced color signals (Y1, x3, y3) and ideal color signals (Y1, x1, y1) is obtained by a color difference calculation section 145; and image display information is corrected by using that color difference (?x, ?y).
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: March 18, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Osamu Wada
  • Patent number: 7345903
    Abstract: A nonvolatile semiconductor memory device having a storage element which is programmed with information by breaking an insulating film of the storage element, includes a cell array including a plurality of storage cells arranged in matrix, each of the storage cells having the storage element and a selection switch connected in series to the storage element, and a row selection control circuit which activates a row selection line connected to a given number of storage cells. The device further includes a write control circuit which controls a voltage of each of data lines bit by bit in accordance with write data, the data lines being connected to a given number of storage cells connected to the row selection line activated by the row selection control circuit.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: March 18, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroaki Nakano, Toshimasa Namekawa, Atsushi Nakayama, Osamu Wada, Hiroshi Ito
  • Patent number: 7345927
    Abstract: A semiconductor integrated circuit device includes a plurality of sense amplifier line pairs, a plurality of sense amplifier latch circuits respectively connected to the sense amplifier line pairs, and a sense amplifier driver circuit which supplies a sense amplifier activation signal to the sense amplifier latch circuits. The sense amplifier driver circuit is provided for each of the plurality of sense amplifier latch circuits and supplies the sense amplifier activation signal to each of the plurality of sense amplifier latch circuits.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: March 18, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Wada, Toshimasa Namekawa
  • Publication number: 20080062782
    Abstract: A nonvolatile semiconductor memory device includes a nonvolatile storage element to which data is inhibited from being rewritten, a read operation control circuit which captures a read operation instruction signal in synchronization with an external input clock, and a write operation control circuit to which a write operation instruction signal is input asynchronously with the external input clock. The read operation instruction signal gives an instruction to start a read operation to read data out of the nonvolatile storage element, and the write operation instruction signal gives an instruction to start a write operation to write data to the nonvolatile storage element. The device further includes a reset circuit which resets an operation of the read operation control circuit upon receiving the write operation instruction signal.
    Type: Application
    Filed: April 11, 2007
    Publication date: March 13, 2008
    Inventors: Toshimasa Namekawa, Hiroshi Ito, Hiroaki Nakano, Osamu Wada, Atsushi Nakayama
  • Patent number: 7333074
    Abstract: The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: February 19, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Osamu Wada, Junichi Nakamura
  • Publication number: 20080002504
    Abstract: A semiconductor memory device includes a memory element, a first data line and a second data line, a first selection transistor, and a second selection transistor. The memory element includes a semiconductor element of MOS structure in which data is programmed when an insulating film provided in the semiconductor element is broken down by application of a voltage thereto. The first and second data lines are connected to a sense amplifier. The first selection transistor is configured to connect the memory element to the first data line in order to program data in the memory element. The second selection transistor is configured to connect the memory element to the second data line in order to program data in the memory element and detect the data programmed in the memory element. The second selection transistor has a smaller gate-electrode width smaller than the first selection transistor.
    Type: Application
    Filed: April 23, 2007
    Publication date: January 3, 2008
    Inventors: Hiroaki Nakano, Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Atsushi Nakayama
  • Patent number: 7310449
    Abstract: An image processing system enabling luminance regulation depending on displayed images is provided by a projector, the projector including: a signal input section which input an image signal; a signal output section which outputs a corrected image signal; an image projecting section; a correction table storage section which stores a correction table showing the relationship between a correction amount and a position in an image; an instruction input section which inputs instruction information representing a correction instruction from a user; and a luminance regulating section which corrects a luminance value of the input image signal to make a luminance value in a central portion of an image lower than the current luminance value of the center portion when uniformity improvement of luminance values in central and marginal portions of the image is desired, or corrects that to make a luminance value in a marginal portion of an image lower than the current luminance value of the marginal portion when emphasis
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: December 18, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Masanobu Kobayashi, Osamu Wada
  • Patent number: 7271504
    Abstract: A semiconductor integrated circuit includes a first logic circuit to which a first power supply voltage is applied and which outputs a first signal, a first level conversion circuit to which the first power supply voltage and a second power supply voltage having an amplitude of second voltage level different from the first power supply voltage are supplied and which outputs a second signal, a second logic circuit to which the second power supply voltage is applied and which outputs a third signal, and a second level conversion circuit which 15 connected between the first and second logic circuits, to which the first and second power supply voltages are applied, and which level-converts the third signal of the second voltage level output from the second logic circuit to the first voltage level and outputs a fourth signal.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: September 18, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Osamu Wada
  • Patent number: 7256754
    Abstract: The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: August 14, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Osamu Wada, Junichi Nakamura