Patents by Inventor Padmapani Nallan

Padmapani Nallan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7838434
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: November 23, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Publication number: 20070077767
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Application
    Filed: August 14, 2006
    Publication date: April 5, 2007
    Applicant: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Patent number: 7094704
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: August 22, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Publication number: 20060060565
    Abstract: A method of plasma etching a metal layer (e.g., titanium (Ti), tantalum (Ta), tungsten (W), and the like) or a metal-containing layer (e.g., tantalum silicon nitride (TaSiN), titanium nitride (TiN), tungsten nitride (WN), and the like) formed on a hafnium-based dielectric material is disclosed. The metal/metal-containing layer is etched using a gas mixture comprising a halogen-containing gas and a fluorine-containing gas. The fluorine within the gas mixture provides a high etch selectivity for the hafnium-based dielectric material.
    Type: Application
    Filed: April 17, 2003
    Publication date: March 23, 2006
    Inventors: Padmapani Nallan, Ajay Kumar, Guangxiang Jin
  • Publication number: 20050176191
    Abstract: A method of fabricating a gate structure of a field effect transistor comprising a gate dielectric that is notched beneath a gate electrode using an isotropic plasma etch process. In one embodiment, the etch process uses a gas comprising a halogen gas (e.g., chlorine (Cl2)), a hydrocarbon gas (e.g., methane (CH4)), and an optional reducing gas (e.g., carbon monoxide (CO)), applies a substrate bias of not greater than 20 W, and maintains the substrate temperature of not less than 200 degrees Celsius.
    Type: Application
    Filed: February 4, 2003
    Publication date: August 11, 2005
    Inventors: Ajay Kumar, Padmapani Nallan
  • Publication number: 20040007561
    Abstract: A method for etching a high K dielectric material comprises etching in a first plasma comprising a halogen containing gas (e.g., chlorine) and a reducing gas (e.g., carbon monoxide) and removing post-etch residue in a second plasma comprising a residue cleaning gas (e.g., oxygen or a mixture of oxygen and nitrogen).
    Type: Application
    Filed: July 12, 2002
    Publication date: January 15, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Padmapani Nallan, Guangxiang Jin, Ajay Kumar
  • Patent number: 6660127
    Abstract: We have discovered a method which permits plasma etching at a constant etch rate. The constant etch rate is achieved by controlling plasma process parameters so that a stable plasma is obtained, with a portion of the power deposited to the plasma being a capacitive contribution, and a portion being an inductive contribution. In particular, a stable plasma may be obtained within two process regions. In the first region, the gradient of the capacitive power to the power applied to the inductively coupled source for plasma generation [∂Pcap/∂PRF] is greater than 0. In the second region, plasma stability is controlled so that [∂Pcap/∂PRF] is less than 0 and so that Pcap<<PRF. Typically, the magnitude of Pcap is less than about 10% of the magnitude of PRF. Operation of the etch process in a stable plasma region enables use of a timed etch end point.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: December 9, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Padmapani Nallan, John Holland, Valentin Todorov, Thorsten Lill
  • Publication number: 20030222296
    Abstract: A method of forming a capacitor using a high dielectric constant material.
    Type: Application
    Filed: June 4, 2002
    Publication date: December 4, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Ajay Kumar, Padmapani Nallan, Anisul H. Khan, Ralph Kerns, Virinder S. Grewal
  • Publication number: 20030211748
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Patent number: 6642151
    Abstract: The present invention provides novel etching techniques for etching Si—Ge, employing SF6/fluorocarbon etch chemistries at a low bias power. These plasma conditions are highly selective to organic photoresist. The techniques of the present invention are suitable for fabricating optically smooth Si—Ge surfaces. A cavity was etched in a layer of a first Si—Ge composition using SF6/C4F8 etch chemistry at low bias power. The cavity was then filled with a second Si—Ge composition having a higher refractive index than the first Si—Ge composition. A waveguide was subsequently fabricated by depositing a cladding layer on the second Si—Ge composition that was formed in the cavity. In a further embodiment a cluster tool is employed for executing processing steps of the present invention inside the vacuum environment of the cluster tool. In an additional embodiment a manufacturing system is provided for fabricating waveguides of the present invention.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: November 4, 2003
    Assignee: Applied Materials, Inc
    Inventors: Anisul Khan, Ajay Kumar, Padmapani Nallan
  • Publication number: 20030176075
    Abstract: The present invention provides novel etching techniques for etching Si—Ge, employing SF6/fluorocarbon etch chemistries at a low bias power. These plasma conditions are highly selective to organic photoresist. The techniques of the present invention are suitable for fabricating optically smooth Si—Ge surfaces. A cavity was etched in a layer of a first Si—Ge composition using SF6/C4F8 etch chemistry at low bias power. The cavity was then filled with a second Si—Ge composition having a higher refractive index than the first Si—Ge composition. A waveguide was subsequently fabricated by depositing a cladding layer on the second Si—Ge composition that was formed in the cavity. In a further embodiment a cluster tool is employed for executing processing steps of the present invention inside the vacuum environment of the cluster tool. In an additional embodiment a manufacturing system is provided for fabricating waveguides of the present invention.
    Type: Application
    Filed: March 6, 2002
    Publication date: September 18, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Anisul Khan, Ajay Kumar, Padmapani Nallan
  • Patent number: 6583065
    Abstract: A process of reducing critical dimension (CD) microloading in dense and isolated regions of etched features of silicon-containing material on a substrate uses a plasma of an etchant gas and an additive gas. In one version, the etchant gas comprises halogen species absent fluorine, and the additive gas comprises fluorine species and carbon species, or hydrogen species and carbon species.
    Type: Grant
    Filed: August 3, 1999
    Date of Patent: June 24, 2003
    Assignee: Applied Materials Inc.
    Inventors: Raney Williams, Jeffrey Chinn, Jitske Trevor, Thorsten B. Lill, Padmapani Nallan, Tamas Varga, Herve Mace
  • Patent number: 6579806
    Abstract: The present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures. We have discovered a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing a rapid etch rate. In particular, the method employs the use of a plasma source gas where the chemically functional etchant species are generated from a combination of sulfur hexafluoride (SF6) and nitrogen (N2), where the sulfur hexafluoride and nitrogen are provided in a volumetric flow rate ratio within the range of about 1:2.5 to about 6:1.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: June 17, 2003
    Assignee: Applied Materials Inc.
    Inventors: Padmapani Nallan, Hakeem Oluseyi
  • Publication number: 20030109138
    Abstract: A method of plasma etching a patterned tantalum layer or a patterned tantalum nitride layer in a semiconductor structure is disclosed. The method provides an advantageous etch rate while enabling excellent profile control during the patterned etching of the tantalum. The method of etching tantalum employs a plasma source gas comprising an inorganic fluorine-comprising gas, such as NF3 or SF6, in combination with a carbon-containing, fluorine-comprising gas, CxHyFz, where x ranges from 1 to about 4, y ranges from 0 to about 4, and z ranges from 1 to about 6. In some of the preferred embodiments, y=0 in the CxHyFz formula, so that the carbon-containing, fluorine-comprising gas has the formula CxFy. Examples of such carbon-containing, fluorine-comprising gases include CF4, C2F6, C3F6, C4F6, C4F8, C5F8, and combinations thereof. The inorganic fluorine-comprising gas serves as the primary etchant, in order to provide a high tantalum etch rate (i.e., greater than 1000 Å per minute).
    Type: Application
    Filed: January 9, 2003
    Publication date: June 12, 2003
    Applicant: Applied Materials, Inc.
    Inventor: Padmapani Nallan
  • Patent number: 6531404
    Abstract: The present disclosure pertains to a method of plasma etching a titanium nitride layer within a semiconductor structure. In many embodiments of the method, the titanium nitride layer is etched using a source gas comprising chlorine and a fluorocarbon. Also disclosed herein is a two-step method of plasma etching a titanium nitride gate consisting of a main etch step, followed by an overetch step which utilizes a source gas comprising chlorine and a bromine-containing compound, to etch a portion of the titanium nitride layer which was not etched in the main etch step. The chlorine/bromine overetch chemistry can be used in conjunction with a chlorine/fluorocarbon main etch chemistry, or with any other titanium nitride etch chemistry known in the art.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: March 11, 2003
    Assignee: Applied Materials Inc.
    Inventors: Padmapani Nallan, Tong Zhang
  • Patent number: 6503845
    Abstract: A method of plasma etching a patterned tantalum nitride layer, which provides an advantageous etch rate and good profile control. The method employs a plasma source gas comprising a primary etchant to provide a reasonable tantalum etch rate, and a secondary etchant/profile-control additive to improve the etched feature profile. The primary etchant is either a fluorine-comprising or an inorganic chlorine-comprising gas. Where a fluorine-comprising gas is the primary etchant, the profile-control additive is a chlorine-comprising gas. Where the chlorine-comprising gas is the primary etchant, the profile-control additive is an inorganic bromine-comprising gas. By changing the ratio of the primary etchant to the profile-control additive, the etch rate and etch profile of the tantalum nitride can be controlled. For best results, the plasma is preferably a high density plasma (minimum electron density of 1011e−/cm3), and a bias power is applied to the semiconductor substrate to increase the etching anisotropy.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: January 7, 2003
    Assignee: Applied Materials Inc.
    Inventor: Padmapani Nallan
  • Publication number: 20030003757
    Abstract: The present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures, and particularly to the etching of gate electrodes which require precise control over the etching process. We have discovered a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing excellent selectivity, of at least 175:1, for example, in favor of etching tungsten or tungsten nitride rather than an adjacent oxide layer. Typically, the oxide is selected from silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof. The method appears to be applicable to tungsten or tungsten nitride, whether deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD).
    Type: Application
    Filed: May 7, 2002
    Publication date: January 2, 2003
    Inventors: Padmapani Nallan, Hakeem Oluseyi
  • Publication number: 20020195416
    Abstract: A method of plasma etching a patterned tantalum nitride layer, which provides an advantageous etch rate and good profile control. The method employs a plasma source gas comprising a primary etchant to provide a reasonable tantalum etch rate, and a secondary etchant/profile-control additive to improve the etched feature profile. The primary etchant is either a fluorine-comprising or an inorganic chlorine-comprising gas. Where a fluorine-comprising gas is the primary etchant, the profile-control additive is a chlorine-comprising gas. Where the chlorine-comprising gas is the primary etchant, the profile-control additive is an inorganic bromine-comprising gas. By changing the ratio of the primary etchant to the profile-control additive, the etch rate and etch profile of the tantalum nitride can be controlled.
    Type: Application
    Filed: May 1, 2001
    Publication date: December 26, 2002
    Applicant: Applied Materials, Inc.
    Inventor: Padmapani Nallan
  • Publication number: 20020137352
    Abstract: In accordance with the present invention, process parameters are controlled to provide a stable etch plasma. We have discovered that it is possible to operate a stable plasma with a portion of the power deposited to the plasma being a capacitive contribution and a portion of the power deposited being an inductive contribution. In particular, a stable plasma may be obtained within two process regions. In the first region, the gradient of the capacitive power to the power applied to the inductively coupled source for plasma generation [∂Pcap/∂PRF] is greater than 0. In the second region, plasma stability is controlled so that [∂Pcap/∂PRF] is less than 0 and so that Pcap<<PRF. Typically, the magnitude of Pcap is less than about 10% of the magnitude of PRF.
    Type: Application
    Filed: February 12, 2002
    Publication date: September 26, 2002
    Inventors: Padmapani Nallan, John Holland, Valentin Todorov, Thorsten Lill
  • Publication number: 20020132488
    Abstract: A method of plasma etching a patterned tantalum layer or a patterned tantalum nitride layer in a semiconductor structure is disclosed. The method provides an advantageous etch rate while enabling excellent profile control during the patterned etching of the tantalum. The method of etching tantalum employs a plasma source gas comprising an inorganic fluorine-comprising gas, such as NF3 or SF6, in combination with a carbon-containing, fluorine-comprising gas, CxHyFz, where x ranges from 1 to about 4, y ranges from 0 to about 4, and z ranges from 1 to about 6. In some of the preferred embodiments, y=0 in the CxHyFz formula, so that the carbon-containing, fluorine-comprising gas has the formula CxFy. Examples of such carbon-containing, fluorine-comprising gases include CF4, C2F6, C3F6, C4F6, C4F8, C5F8, and combinations thereof. The inorganic fluorine-comprising gas serves as the primary etchant, in order to provide a high tantalum etch rate (i.e., greater than 1000 Å per minute).
    Type: Application
    Filed: January 12, 2001
    Publication date: September 19, 2002
    Applicant: Applied Materials, Inc.
    Inventor: Padmapani Nallan