Patents by Inventor Pankaj K. Jha
Pankaj K. Jha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10284469Abstract: One embodiment of the present invention provides a switch in a network of interconnected switches. The switch includes a storage device, a hardware management apparatus, and a layer-2 management apparatus. The storage device stores a forwarding table, which includes an entry comprising a MAC address and an egress port for the MAC address. The hardware management apparatus determines whether a destination MAC address of a frame is present in a hardware table in memory of the switch. The layer-2 management apparatus, in response to a determination that the destination MAC address is not present in the hardware table, looks up a first entry comprising the destination MAC address in the forwarding table, and creates a second entry comprising the destination MAC address in the hardware table based on the first entry.Type: GrantFiled: September 29, 2017Date of Patent: May 7, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Suresh Vobbilisetty, Mythilikanth Raman, Phanidhar Koganti, Raju Shekarappa, Mahesh K. Pujara, Pankaj K. Jha
-
Publication number: 20180026889Abstract: One embodiment of the present invention provides a switch in a network of interconnected switches. The switch includes a storage device, a hardware management apparatus, and a layer-2 management apparatus. The storage device stores a forwarding table, which includes an entry comprising a MAC address and an egress port for the MAC address. The hardware management apparatus determines whether a destination MAC address of a frame is present in a hardware table in memory of the switch. The layer-2 management apparatus, in response to a determination that the destination MAC address is not present in the hardware table, looks up a first entry comprising the destination MAC address in the forwarding table, and creates a second entry comprising the destination MAC address in the hardware table based on the first entry.Type: ApplicationFiled: September 29, 2017Publication date: January 25, 2018Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Suresh Vobbilisetty, Mythilikanth Raman, Phanidhar Koganti, Raju Shekarappa, Mahesh K. Pujara, Pankaj K. Jha
-
Patent number: 9807007Abstract: One embodiment of the present invention provides a switch in a network of interconnected switches. The switch includes a storage device, a hardware management apparatus, and a layer-2 management apparatus. The storage device stores a forwarding table, which includes an entry comprising a MAC address and an egress port for the MAC address. The hardware management apparatus determines whether a destination MAC address of a frame is present in a hardware table in memory of the switch. The layer-2 management apparatus, in response to a determination that the destination MAC address is not present in the hardware table, looks up a first entry comprising the destination MAC address in the forwarding table, and creates a second entry comprising the destination MAC address in the hardware table based on the first entry.Type: GrantFiled: August 10, 2015Date of Patent: October 31, 2017Assignee: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Suresh Vobbilisetty, Mythilikanth Raman, Phanidhar Koganti, Raju Shekarappa, Mahesh K. Pujara, Pankaj K. Jha
-
Publication number: 20160043950Abstract: One embodiment of the present invention provides a switch in a network of interconnected switches. The switch includes a storage device, a hardware management apparatus, and a layer-2 management apparatus. The storage device stores a forwarding table, which includes an entry comprising a MAC address and an egress port for the MAC address. The hardware management apparatus determines whether a destination MAC address of a frame is present in a hardware table in memory of the switch. The layer-2 management apparatus, in response to a determination that the destination MAC address is not present in the hardware table, looks up a first entry comprising the destination MAC address in the forwarding table, and creates a second entry comprising the destination MAC address in the hardware table based on the first entry.Type: ApplicationFiled: August 10, 2015Publication date: February 11, 2016Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Suresh Vobbilisetty, Mythilikanth Raman, Phanidhar Koganti, Raju Shekarappa, Mahesh K. Pujara, Pankaj K. Jha
-
Patent number: 9170168Abstract: A system for measuring a mass property of an object is provided. The system includes a first shaft having a first end and a second end and a table disposed in a first plane and coupled to the first shaft at a predetermined angle to support the object. The table is configured to pivot about an axis perpendicular to the first plane between at least a first pivot position and a second pivot position. The system further includes a torque sensor configured to collect a first torque measurement on the first shaft when the table is in the first pivot position and a second torque measurement on the first shaft when the table in the second pivot position.Type: GrantFiled: November 27, 2012Date of Patent: October 27, 2015Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Pankaj K. Jha, Praveenkumar Panuganti, Michael D. Nienhuis
-
Patent number: 9166818Abstract: Techniques for provisioning single or multistage networks using Ethernet Service Instances (ESIs). In one embodiment, an ESI is a logical entity or object that stores information that may be used to provision a network. An ESI may represent a logical entity that identifies a grouping of elements of a network or network device and associated attributes. Hierarchical relationships may be created between ESIs. The hierarchical relationships are used to perform packet-level processing including performing network packet encapsulations.Type: GrantFiled: November 18, 2013Date of Patent: October 20, 2015Assignee: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Vivek Agarwal, Mitri Halabi, Ananda Rajagopal, Ram Dular Singh
-
Patent number: 9053271Abstract: An electronic design automation (EDA) tool that analyzes a circuit design to identify sequential elements (flip-flops) that do not need to be reset, for example, because they do not need to be initialized in order to be in a known state, and converts the identified sequential elements to non-resettable circuits, which saves power and area.Type: GrantFiled: February 6, 2014Date of Patent: June 9, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Deep Gupta, Puneet Dodeja, Arvind Garg, Pankaj K. Jha
-
Patent number: 8995444Abstract: A system is provided for facilitating assignment of a virtual routing node identifier to a non-routing node. During operation, the system assigns to a non-routing node coupled to a switch a virtual routing node identifier unique to the non-routing node. In addition, the system communicates reachability information corresponding to the virtual routing node identifier to other switches in the network.Type: GrantFiled: February 4, 2013Date of Patent: March 31, 2015Assignee: Brocade Communication Systems, Inc.Inventors: Pankaj K. Jha, Mitri Halabi
-
Publication number: 20140233423Abstract: Techniques for provisioning single or multistage networks using Ethernet Service Instances (ESIs). In one embodiment, an ESI is a logical entity or object that stores information that may be used to provision a network. An ESI may represent a logical entity that identifies a grouping of elements of a network or network device and associated attributes. Hierarchical relationships may be created between ESIs. The hierarchical relationships are used to perform packet-level processing including performing network packet encapsulations.Type: ApplicationFiled: November 18, 2013Publication date: August 21, 2014Applicant: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Vivek Agarwal, Mitri Halabi, Ananda Rajagopal, Ram Dular Singh
-
Publication number: 20140144256Abstract: A system for measuring a mass property of an object is provided. The system includes a first shaft having a first end and a second end and a table disposed in a first plane and coupled to the first shaft at a predetermined angle to support the object. The table is configured to pivot about an axis perpendicular to the first plane between at least a first pivot position and a second pivot position. The system further includes a torque sensor configured to collect a first torque measurement on the first shaft when the table is in the first pivot position and a second torque measurement on the first shaft when the table in the second pivot position.Type: ApplicationFiled: November 27, 2012Publication date: May 29, 2014Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: PANKAJ K. JHA, PRAVEENKUMAR PANUGANTI, MICHAEL D. NIENHUIS
-
Patent number: 8599850Abstract: Techniques for provisioning single or multistage networks using Ethernet Service Instances (ESIs). In one embodiment, an ESI is a logical entity or object that stores information that may be used to provision a network. An ESI may represent a logical entity that identifies a grouping of elements of a network or network device and associated attributes. Hierarchical relationships may be created between ESIs. The hierarchical relationships are used to perform packet-level processing including performing network packet encapsulations.Type: GrantFiled: January 7, 2010Date of Patent: December 3, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Vivek Agarwal, Mitri Halabi, Ananda Rajagopal, Ram Dular Singh
-
Patent number: 8448114Abstract: A method for balancing both edges of a signal of an integrated circuit (IC) design includes defining a virtual cell to have the same geometry as that of a port of the IC design. First and second input pins of the virtual cell are defined for detecting rising and falling edges. The first and second input pin geometries are defined to be the same as that of the corresponding pins of the port. The virtual cell is overlapped with the port so the first and second input pins are connected to the corresponding port network. The first and second input pins are configured as sinks for clock and buffer tree synthesis. An EDA tool identifies the first and second input pins as additional parallel sinks on the port network and balances the rising and falling edges of the signal at the port.Type: GrantFiled: January 23, 2012Date of Patent: May 21, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Deep Gupta, Puneet Dodeja, Pankaj K. Jha
-
Patent number: 8369335Abstract: A system is provided for facilitating assignment of a virtual routing node identifier to a non-routing node. During operation, the system assigns to a non-routing node coupled to a switch a virtual routing node identifier unique to the non-routing node. In addition, the system communicates reachability information corresponding to the virtual routing node identifier to other switches in the network.Type: GrantFiled: March 24, 2010Date of Patent: February 5, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Mitri Halabi
-
Patent number: 8288814Abstract: A semiconductor die includes a first set of metal lines and a second set of metal lines. The first set of metal lines and the second set of metal lines are placed in alternate planes and are orthogonal to each other. A via is used to connect a first metal line from the first set of metal lines with a second metal line from the second set of metal lines. The via location is offset such that a side of the first metal line is aligned with a side of the second metal line. Consequently, a metal line adjacent to the first metal line does not need to detour around the via.Type: GrantFiled: November 17, 2009Date of Patent: October 16, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Pankaj K Jha, Rajesh Bansal, Chetan Verma
-
Publication number: 20110235523Abstract: A system is provided for facilitating assignment of a virtual routing node identifier to a non-routing node. During operation, the system assigns to a non-routing node coupled to a switch a virtual routing node identifier unique to the non-routing node. In addition, the system communicates reachability information corresponding to the virtual routing node identifier to other switches in the network.Type: ApplicationFiled: March 24, 2010Publication date: September 29, 2011Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Pankaj K. Jha, Mitri Halabi
-
Publication number: 20110069711Abstract: Techniques for provisioning single or multistage networks using Ethernet Service Instances (ESIs). In one embodiment, an ESI is a logical entity or object that stores information that may be used to provision a network. An ESI may represent a logical entity that identifies a grouping of elements of a network or network device and associated attributes. Hierarchical relationships may be created between ESIs. The hierarchical relationships are used to perform packet-level processing including performing network packet encapsulations.Type: ApplicationFiled: January 7, 2010Publication date: March 24, 2011Applicant: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Vivek Agarwal, Mitri Halabi, Ananda Rajagopal, Ram Dular Singh
-
Patent number: 7843922Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a framer to receive packets, to determine a type associated with received packets, to pass data packets to a network processor, and to pass control packets to a host processor. The apparatus also includes a processor coupled to the framer to control the framer.Type: GrantFiled: December 18, 2002Date of Patent: November 30, 2010Assignee: Cypress Semiconductor CorporationInventor: Pankaj K. Jha
-
Publication number: 20100181683Abstract: A semiconductor die includes a first set of metal lines and a second set of metal lines. The first set of metal lines and the second set of metal lines are placed in alternate planes and are orthogonal to each other. A via is used to connect a first metal line from the first set of metal lines with a second metal line from the second set of metal lines. The via location is offset such that a side of the first metal line is aligned with a side of the second metal line. Consequently, a metal line adjacent to the first metal line does not need to detour around the via.Type: ApplicationFiled: November 17, 2009Publication date: July 22, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Pankaj K Jha, Rajesh Bansal, Chetan Verma
-
Patent number: 7161946Abstract: A router generally comprising a first port, a second port, and a circuit. The first port may be configured to receive a frame having a network layer protocol identification. The second port may be connectable to a Multi-Protocol Label Switching (MPLS) network. The circuit may be configured to (i) insert an MPLS label into the frame while retaining the network layer protocol identification and (ii) present the frame in the MPLS network per the MPLS label.Type: GrantFiled: December 12, 2001Date of Patent: January 9, 2007Assignee: Cypress Semiconductor Corp.Inventor: Pankaj K. Jha
-
Patent number: 7017097Abstract: An apparatus generally comprising a circuit and an interface device is disclosed. The circuit may be configured to (i) generate a plurality of test signals to simultaneously stimulate a device and a model of the device during a test and (ii) receive a plurality of model signals generated by the model in response to the test signals. The interface device may be configured to receive a plurality of device signals generated by the device in response the test signals.Type: GrantFiled: September 24, 2002Date of Patent: March 21, 2006Assignee: Cypress Semiconductor Corp.Inventors: Michael T. Moore, Victor So, Pankaj K. Jha