Abstract: A microcontroller is operable to monitor power supply levels corresponding, respectively, to a first power supply (e.g., a main power supply) and a second power supply (e.g., a battery backup power supply). In one or more modes of operation, the same brownout detector in the microcontroller alternately monitors signals corresponding, respectively, to the first and second power supply levels.

Abstract: Embodiments of the present disclosure include a power management unit for controlling power in a microcontroller. The unit causes a first voltage to be provided in an active mode. In a sleep mode, the unit determines whether a supply voltage is less than an upper reference voltage and, if so, cause a second voltage greater than the first voltage to be provided. If not, the unit inhibits operation of voltage regulation of power supplied to the microcontroller. After inhibition of operation of voltage regulation, the unit determines whether the supply voltage has fallen to a lower reference voltage and, if so, applies the second voltage to the microcontroller.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper.

Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.

Abstract: Embodiments of the present disclosure include a power management unit for controlling power in a microcontroller. The unit causes a first voltage to be provided in an active mode. In a sleep mode, the unit determines whether a supply voltage is less than an upper reference voltage and, if so, cause a second voltage greater than the first voltage to be provided. If not, the unit inhibits operation of voltage regulation of power supplied to the microcontroller. After inhibition of operation of voltage regulation, the unit determines whether the supply voltage has fallen to a lower reference voltage and, if so, applies the second voltage to the microcontroller.

Abstract: A microcontroller is operable to monitor power supply levels corresponding, respectively, to a first power supply (e.g., a main power supply) and a second power supply (e.g., a battery backup power supply). In one or more modes of operation, the same brownout detector in the microcontroller alternately monitors signals corresponding, respectively, to the first and second power supply levels.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller is operable to monitor power supply levels corresponding, respectively, to a first power supply (e.g., a main power supply) and a second power supply (e.g., a battery backup power supply). In one or more modes of operation, the same brownout detector in the microcontroller alternately monitors signals corresponding, respectively, to the first and second power supply levels.

Abstract: A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller is operable to monitor power supply levels corresponding, respectively, to a first power supply (e.g., a main power supply) and a second power supply (e.g., a battery backup power supply). In one or more modes of operation, the same brownout detector in the microcontroller alternately monitors signals corresponding, respectively, to the first and second power supply levels.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.

Abstract: A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.

Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.

Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper.

Abstract: A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.