Abstract: A microcontroller system includes a main voltage regulator and a low power voltage regulator having a static current consumption less than the static current consumption of the main voltage regulator. A power state controller enables the low power voltage regulator during a power saving mode. On exiting the power saving mode, the power state controller enables the main voltage regulator and disables the low power voltage regulator after determining that the main voltage regulator is ready. The switching circuitry can be asynchronous.

Abstract: The disclosure relates to a reverse Polish notation processing device, allowing execution of a set of instructions wherein each instruction comprises N operands at most, where N?1. The device implements management of a stack whose size is variable. Such a device includes: a storage device including a random access memory and a cache memory; a stack pointer managing device for managing a stack pointer; and a contents managing device for managing the contents of the stages of the stack, according to said stack pointer. For each of the first N stages of the stack, the content of said stage is stored in the cache memory, and for each of the other stages of the stack, the content of said stage is stored in the random access memory; allowing to manage content overflows from the cache memory towards the random access memory, and vice-versa.