Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments, an insulative material may be formed on or over a sidewall portion of a conductive contact region. The insulative material may insulate the conductive contact region from resputtered CEM occurring during a physical etch of a CEM film.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) device. In particular embodiments, layers of a CEM to form a correlated electron switch (CES) device may be disposed between layers of electrode material. Use of a metal nitride as an electrode material for at least one terminal of a CES device may simplify processes to implement a CES device in an integrated circuit device such as in back end of line processing.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) device. In particular embodiments, formation of a CEM device may include application of rapid thermal annealing to doped layers of a metal oxide.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments, formation of a CEM switch may include removing of an exposed portion of a CEM film to form an exposed sidewall region bordering a remaining unexposed portion of the CEM film under or beneath a conductive overlay. The method may further include at least partially restoring properties of the exposed sidewall region to a CEM via exposure of the exposed sidewall region to one or more gaseous annealing agents.

Abstract: Various implementations described herein are directed to a device having a multi-layered structure that may be formed on a substrate. The multi-layered structure may have a switching layer, and the switching layer may be formed with correlated electron material (CEM). The multi-layered structure may have at least one barrier layer, and the at least one barrier layer may be referred to as at least one hydrogen barrier layer.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) switching device, the method comprising: forming a layer of a conductive substrate; forming a layer of a correlated electron material on the conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; and patterning the layers whereby to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, wherein the patterning comprises the following steps: forming a hard mask on the layer of the conductive overlay; dry etching the layer of conductive overlay and the layer of correlated electron material whereby to form a partially formed stack; depositing a coating of a protective polymer over at least sidewalls of the partially formed stack; and dry etching the layer of conductive substrate.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments a method may include forming a structure on a first portion of a substrate while maintaining a second portion of the substrate exposed. A sealing layer may be deposited over the structure and over at least a portion of the exposed second portion of the substrate. A conductive via may be formed by way of a dry etch through the sealing layer to contact the exposed metal layer. In embodiments, an etch-stop control layer may be utilized to control an etching process prior to formation of metal contacts over the CEM switch and the conductive via.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) device. Layers of a CEM to form a correlated electron switch (CES) device may be disposed between layers of electrode material. In an embodiment, one or more techniques may be employed to remove and/or neutralize parasitic features and/or devices introduced during manufacture of the CEM device.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) device to an comprising: forming a layer of a conductive substrate on a substrate; forming a layer of a correlated electron material on the layer of conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; patterning these layers to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay on the substrate; forming a cover layer of an insulating material over the stack; and patterning the cover layer wherein: the patterning of the cover layer comprises etching a via in the cover layer whereby to expose a part of the upper surface of the conductive overlay and etching a trench in the cover layer such that the trench surrounds the via.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments a method may include forming a structure on a first portion of a substrate while maintaining a second portion of the substrate exposed. A sealing layer may be deposited over the structure and over at least a portion of the exposed second portion of the substrate. A conductive via may be formed by way of a dry etch through the sealing layer to contact the exposed metal layer. In embodiments, an etch-stop control layer may be utilized to control an etching process prior to formation of metal contacts over the CEM switch and the conductive via.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments a method may include forming a structure on a first portion of a substrate while maintaining a second portion of the substrate exposed. A sealing layer may be deposited over the structure and over at least a portion of the exposed second portion of the substrate. A conductive via may be formed by way of a dry etch through the sealing layer to contact the exposed metal layer. In embodiments, an etch-stop control layer may be utilized to control an etching process prior to formation of metal contacts over the CEM switch and the conductive via.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments, formation of a CEM switch may include removing of an exposed portion of a CEM film to form an exposed sidewall region bordering a remaining unexposed portion of the CEM film under or beneath a conductive overlay. The method may further include at least partially restoring properties of the exposed sidewall region to a CEM via exposure of the exposed sidewall region to one or more gaseous annealing agents.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments, an insulative material may be formed on or over a sidewall portion of a conductive contact region. The insulative material may insulate the conductive contact region from resputtered CEM occurring during a physical etch of a CEM film.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) device comprising: forming a layer of a conductive substrate on a substrate; forming a layer of a correlated electron material on the layer of conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; patterning these layers to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, on the substrate; forming a cover layer of an insulating material over the stack; and patterning the cover layer wherein: the patterning of the cover layer comprises etching a trench in the cover layer whereby to expose the conductive overlay; and the method further comprises treating the exposed conductive overlay to remove an oxidation layer there from.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) switching device, the method comprising: forming a layer of a conductive substrate; forming a layer of a correlated electron material on the conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; and patterning the layers whereby to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, wherein the patterning comprises the following steps: forming a hard mask on the layer of the conductive overlay; dry etching the layer of conductive overlay and the layer of correlated electron material whereby to form a partially formed stack; depositing a coating of a protective polymer over at least sidewalls of the partially formed stack; and dry etching the layer of conductive substrate.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) device comprising: forming a layer of a conductive substrate on a substrate; forming a layer of a correlated electron material on the layer of conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; patterning these layers to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, on the substrate; forming a cover layer of an insulating material over the stack; and patterning the cover layer wherein: the patterning of the cover layer comprises etching a trench in the cover layer whereby to expose the conductive overlay; and the method further comprises treating the exposed conductive overlay to remove an oxidation layer there from.

Abstract: Disclosed is a method for the fabrication of a correlated electron material (CEM) switching device, the method comprising: forming a layer of a conductive substrate; forming a layer of a correlated electron material on the conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; and patterning the layers whereby to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, wherein the patterning comprises the following steps: forming a hard mask on the layer of the conductive overlay; dry etching the layer of conductive overlay and the layer of correlated electron material whereby to form a partially formed stack; depositing a coating of a protective polymer over at least sidewalls of the partially formed stack; and dry etching the layer of conductive substrate.

Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, precursors, in a gaseous form, may be utilized in a chamber to build a film of correlated electron materials comprising various impedance characteristics. In embodiments, a film of correlated electron materials may be annealed after deposition and prior to depositing a conductive material over the film.

Abstract: A method for forming a barrier diffusion layer on a substrate includes depositing a tantalum layer in features of the substrate using an atomic layer deposition process. The method includes depositing a titanium layer on the tantalum layer using an atomic layer deposition process. The method includes annealing the substrate to form the barrier diffusion layer including a tantalum-titanium alloy.

Abstract: A method for making an integrated circuit includes a) providing a substrate including n-type metal oxide semiconductor field effect transistors (NMOSFETs) and p-type metal oxide semiconductor field effect transistors (PMOSFETs), wherein channel regions of the NMOSFETs and the PMOSFETs include germanium; b) depositing and patterning a mask layer to mask the channel regions of the PMOSFETs and to not mask the channel regions of the NMOSFETs; c) passivating an exposed surface of the substrate; d) removing the mask layer; and e) depositing a metal contact layer on both the NMOSFETs and the PMOSFETs.