Abstract: An arrangement for separating a fluid from admixtures comprises at least a first (36) and a second separation unit (45). The separation units are of the type needing an increased pressure or pressure difference for their function of showing improved performance with increased pressure.

Abstract: A four stage process for producing high quality white oils, particularly food or medicinal grade mineral oils from mineral oil distillates. The first reaction stage employs a sulfur resistant hydrotreating catalyst and produces a product suitable for use as a high quality lubricating oil base stock. The second reaction stage employs a hydrogenation/hydrodesulfurization catalyst. The third stage employs a reduced metal sulfur sorbent producing a product stream which is low in aromatics and which has substantially “nil” sulfur. The final reaction stage employs a selective hydrogenation catalyst that produces a product suitable as a food or medicinal grade white oil.

Abstract: An electronic component is described and has a dielectric layer which is constructed on a substrate, conductive surfaces that are constructed on the dielectric layer, and an electrically conductive guard structure. The guard structure is disposed in a plane above the conductive surfaces such that the conductive surfaces are not completely covered by the guard structure.

Abstract: The lifetime of a double-cone device (21) for creating a pressure difference in a streaming fluid can be greatly increased by moving the inlet gap (5) into the exit cone (4). This results in a short so-called diffuser (22) being obtained between the gap (5) and the orifice (19), where entry cone (3) and exit cone (4) are connected. The increased lifetime permits the double-cone device to cope with much higher flow rates. Thus higher system pressures are created which enhance the use of the double-cone for such applications as the desalination of sea water by reverse osmosis. The important application of the seperation of oil from water using a separating device such as a cyclone (57) working under elevated pressure is now feasible. The increased power of the double-cone permits one to profit more fully from the new concept of reduction of the concentration of the feed supplied to the double-cone device (21).

Abstract: A semiconductor component with passivation includes at least two double passivating layers, of which an uppermost is applied to a planar surface of a layer located therebelow. The double passivating layers include two layers of different dielectric materials, for example silicon oxide and silicon nitride. The respective thicknesses of the individual passivating layers can be adapted to dimensions of the structuring of the layer to which the passivation is applied. This produces a reliable passivation which is particularly suitable for capacitively measuring fingerprint sensors.

Abstract: A grid of capacitor surfaces is connected to read lines and control lines. The read lines are connected alternately to the output of a feedback operational amplifier and to a collecting capacitor. The capacitances to be measured are charged repeatedly and the charges are collected on the collecting capacitors. Between the charging operations, the potential on the read lines is kept constant through the use of the low-resistance output of the operational amplifier. The use of this method in the case of a fingerprint sensor makes it possible to evaluate all the read lines together.

Abstract: A four stage process for producing high quality white oils, particularly food or medicinal grade mineral oils from mineral oil distillates. The first reaction stage employs a sulfur resistant hydrotreating catalyst and produces a product suitable for use as a high quality lubricating oil base stock. The second reaction stage employs a hydrogenation/hydrodesulfurization catalyst. The third stage employs a reduced metal sulfur sorbent producing a product stream which is low in aromatics and which has substantially “nil” sulfur. The final reaction stage employs a selective hydrogenation catalyst that produces a product suitable as a food or medicinal grade white oil.

Abstract: The circuit arrangement or the operating method ensure that the fingerprint sensor is started automatically when a sufficiently high-contrast image can be produced. To this end, test runs are carried out in which only pan of the pixels, for instance along a column or line of a matrix-like array in a square raster, are taken into account. It is determined whether the difference between the maximum and minimum values of the sensor signals exceeds a predetermined value. In said case, the normal scanning procedure of the fingerprint sensor is started.

Abstract: A computerized method for determining a credit line to be issued by a financial service provider to an applicant business entity is provided. The method allows for collection of financial data for the applicant entity. The method further allows for processing the collected financial data to determine a base amount for the credit line. The base credit line is then adjusted based on the output from an evidential reasoning tool to determine the credit line to be issued to the applicant entity.

Abstract: A bumper system for a motor vehicle includes an energy absorber and a bumper beam connected to the energy absorber and for connection to vehicle structure and having a general B shape. The bumper system also includes a member disposed between the bumper beam and a rail of the motor vehicle to absorb energy during an impact with an object by the bumper system.

Abstract: A number of memory cell lines insulated from one another and that respectively comprise a first doped region and a second doped region between which a gate dielectric, which contains a material with charge carrier traps and a number of gate electrodes. The spacing of neighboring gate electrodes is smaller than the dimensions of the gate electrodes. The information is stored by introduction of charge carriers into the gate dielectric. The gate electrodes are preferably manufactured with the assistance of a spacer technique.

Abstract: A conductor layer is patterned into flat portions, for example of a fingerprint sensor that effects capacitive measurement. The conductor layer is fragmented in a lattice-like manner by cutouts so that an applied passivation layer rests on a base layer that is present beneath the conductor layer. The interlaminar shear strength of the passivation is increased in this way.

Abstract: An electronic component is described and has a dielectric layer which is constructed on a substrate, conductive surfaces that are constructed on the dielectric layer, and an electrically conductive guard structure. The guard structure is disposed in a plane above the conductive surfaces such that the conductive surfaces are not completely covered by the guard structure.

Abstract: A grid-shaped array of conductor areas is used for capacitive image acquisition. Shielding conductors are disposed in each case between the conductors that are provided for measurement. During a plurality of charging and discharging cycles, the potential is always carried along on the conductors belonging to a respective pixel in order to prevent displacement currents between the shielding capacitors. By way of example, a compensation line with a feedback operational amplifier can be used for identically altering the electrical potentials on the conductors.

Abstract: The SRAM cell arrangement comprises six MOS transistors per memory cell that are fashioned as vertical transistors. The MOS transistors are arranged at sidewalls of trenches (G1, G2, G4). Parts of the memory cell such as, for example, gate electrodes (Ga2, Ga4) or conductive structures (L3) fashioned as spacer are contacted via adjacent, horizontal, conductive structures (H5) arranged above a surface (O) of a substrate (S). Connections between parts of memory cells ensue via third conductive structures (L3) arranged at the sidewalls of the depressions and word lines (W) via diffusion regions (D2) that are adjacent to the sidewalls of the depressions within the substrate (S), via first bit lines, via second bit lines (B2) or/and via conductive structures (L1, L2, L6) that are partially arranged at different height with respect to an axis perpendicular to the surface (O). Contacts (K5) contact a plurality of parts of the MOS transistors simultaneously.

Abstract: A grid-shaped array of conductor areas is used for capacitive image acquisition. Shielding conductors are disposed in each case between the conductors that are provided for measurement. During a plurality of charging and discharging cycles, the potential is always carried along on the conductors belonging to a respective pixel in order to prevent displacement currents between the shielding capacitors. By way of example, a compensation line with a feedback operational amplifier can be used for identically altering the electrical potentials on the conductors.

Abstract: A semiconductor component with passivation includes at least two double passivating layers, of which an uppermost is applied to a planar surface of a layer located therebelow. The double passivating layers include two layers of different dielectric materials, for example silicon oxide and silicon nitride. The respective thicknesses of the individual passivating layers can be adapted to dimensions of the structuring of the layer to which the passivation is applied. This produces a reliable passivation which is particularly suitable for capacitively measuring fingerprint sensors.

Abstract: A grid of capacitor surfaces is connected to read lines and control lines. The read lines are connected alternately to the output of a feedback operational amplifier and to a collecting capacitor. The capacitances to be measured are charged repeatedly and the charges are collected on the collecting capacitors. Between the charging operations, the potential on the read lines is kept constant through the use of the low-resistance output of the operational amplifier. The use of this method in the case of a fingerprint sensor makes it possible to evaluate all the read lines together.

Abstract: A memory cell configuration contains a multiplicity of memory cells in a semiconductor substrate. Each of the memory cells has a selection transistor connected between a bit line and a storage element. The memory cells can each be driven via a first word line and a second word line, the first word line and the second word line crossing one another. The memory cell configuration is, in particular, a DRAM configuration.

Abstract: An SRAM cell arrangement which includes six MOS transistors per memory cell wherein each transistor is formed as a vertical transistors. The MOS transistors are arranged at sidewalls of trenches. Parts of the memory cell such as, for example, gate electrodes or conductive structures fashioned as spacers are contacted via adjacent, horizontal, conductive structures arranged above a surface of a substrate. Connections between parts of memory cells occur via third conductive structures arranged at the sidewalls of the depressions and word lines via diffusion regions that are adjacent to the sidewalls of the depressions within the substrate, via first bit lines, via second bit lines and/or via conductive structures that are partially arranged at different heights with respect to an axis perpendicular to the surface. Contacts contact a plurality of parts of the MOS transistors simultaneously.