Abstract: A thin film deposition apparatus and method are disclosed in this invention. The apparatus includes a depositing thin-film particle source, a beam-defining aperture between the particle source and the deposited substrate(s), and a substrate holder to rotate the substrate(s) around its center and move the center along a lateral path so that the substrate(s) can scan across the particle beam from one substrate edge to the other edge. The method includes a step of providing a vacuum chamber for containing a thin-film particle source for generating thin-film particles to deposit a thin-film on the substrates. The method further includes a step of containing a substrate holder in the vacuum chamber for holding a plurality of substrates having a thin-film deposition surface of each substrate facing the beam of thin-film particles.

Abstract: The present invention discloses methods and apparatus for constructing optical switch systems, in which any input optical signals can be routed to any output ports. The methods and apparatus provide advantages of configuration flexibility, modular construction, constant signal loss, and minimal numbers of switch units required. The switch systems comprise M×N switch modules. The switch module in turn comprises a two-dimensional waveguide array and a number of waveguide grating-based wavelength selective switches. With the capability of wavelength-selective routing provided by the switch modules, the optical switch systems requires a relatively small amount of switch units to extend into a very-large-scale switch system.

Abstract: A wavelength converter is disclosed. The converter comprises a broadband light source producing light having a plurality of wavelengths. Further, a semiconductor optical amplifier is provided that receives the light from the light source. The semiconductor optical amplifier amplifies the light under the control of a control signal related to an optical signal of a first wavelength. Next, a demultiplexer receives the output of the semiconductor optical amplifier and extracts from the amplified optical signal at least one of the plurality of wavelengths.

Abstract: The present invention discloses a drop-before-add optical routing and switching system. The drop-before-add optical routing and switching system includes an input waveguide for carrying a multiplexed optical signal comprising optical signals transmitted over a plurality of wavelength channels represented by &lgr;1, &lgr;2, &lgr;3, . . . , &lgr;N−1 and &lgr;N, where N is a positive integer wherein the input waveguide extending over a first direction. The drop-before-add optical routing and switching system further includes a plurality of second direction waveguides extending over a second direction and intersecting at N intersections with the input waveguide. The drop-before-add optical routing and switching system further includes a plurality of wavelength selective grating switches each disposed on one of the N intersections for selectively transmitting an optical signal of a selected wavelength into an associated one of the second direction waveguide.

Abstract: This invention relates to optical add/drop devices. These optical add/drop devices are all based on waveguide grating-based wavelength selective switches. Four types of optical switches (S-, L-. X-, and O-type) are disclosed and used to build optical add/drop devices. In addition to the universal advantage of requiring no multiplexers and demultiplexers, each type of switches has its own advantages to build add/drop devices. A simple add/drop device can be made by using only two switches. A large-scale add/drop device can also be built upon same switches. Since the switches are integrated and fabricated on a silicon-based substrate, the size and cost of the add/drop devices are also significantly reduced.

Abstract: The present invention is a “bi-directional” high-density optical switch, which allows for size reduction of the optical switching matrix and the optical switching matrix package. Interlacing input and output channels and plurality of waveguides and 4 types of switching cells enable this high density optical switch to alternate the placement of the fiber guides on either side of the matrix substrate, leading to a significant overall reduction in the dimensions of the optical switching matrix.

Abstract: The present invention discloses a switching matrix configuration to reduce the optical propagation losses and coupling losses. The switching matrix comprises M horizontal waveguides interested with 2N vertical waveguides, where M and N are positive integers and the optical switching system is configured to receive a multiplexed input optical signal from a horizontal waveguide disposed next to an i-th horizontal waveguide where i is a closest integer to a positive real number M/2.

Abstract: The present invention is a wavelength-selective optical switching system. The switching system includes an input waveguide designated as waveguide WG(0) for receiving a multiplexed optical signal comprising optical signals transmitted over a plurality of wavelength channels represented by &lgr;1, &lgr;2, &lgr;3, , &lgr;N, where N is a positive integer wherein the input waveguide extending over a first direction. The switching system further includes a two dimensional waveguide array comprising a plurality of first direction waveguides WG(i), i=1, 2, 3, , M extending over the first direction substantially parallel to the input waveguide WG(0) where M is a positive integer and a plurality of second direction waveguides WG′(j), j=1, 2, 3, N, extending over a second direction substantially perpendicular to the first direction and intersecting with the input waveguide and each of the first direction waveguide WG(i), i=0, 1, 2, 3, ,M, thus forming (M+1)×N intersections.

Abstract: A thin film deposition apparatus and method are disclosed in this invention. The apparatus includes a depositing thin-film particle source, a beam-defining aperture between the particle source and the deposited substrate(s), and a substrate holder to rotate the substrate(s) around its center and move the center along a lateral path so that the substrate(s) can scan across the particle beam from one substrate edge to the other edge. The method includes a step of providing a vacuum chamber for containing a thin-film particle source for generating thin-film particles to deposit a thin-film on the substrates. The method further includes a step of containing a substrate holder in the vacuum chamber for holding a plurality of substrates having a thin-film deposition surface of each substrate facing the beam of thin-film particles.

Abstract: The present invention discloses a wafer which includes a semiconductor substrate having a top surface and a device layer disposed near the top surface for fabrication of integrated circuits (ICs) therein. The wafer also includes an insulating layer beneath the device layer for insulating the device layer with the ICs to be fabricated therein. The wafer further includes a doped region in the substrate. The doped region may be a layer beneath the insulating layer. The doped region is a region of sufficient volume whereby the doped region may be used as a charge sink for protecting the IC devices to be fabricated on the device layer from being damaged by the electric static discharge (ESD) and electric over stress (EOS). Furthermore, the doped region is a region of sufficient dopant concentration whereby the doped region may be used as an electrical connecting means for the IC devices to be fabricated in the device layer such that the doped region becomes a part of integration of the IC devices.

Abstract: The present invention discloses a wafer which includes a semiconductor substrate having a top surface and a device layer disposed near the top surface for fabrication of integrated circuits (ICs) therein. The wafer also includes an insulating layer beneath the device layer for insulating the device layer with the ICs to be fabricated therein. The wafer further includes a doped region in the substrate. The doped region may be a layer beneath the insulating layer. The doped region is a region of sufficient volume whereby the doped region may be used as a charge sink for protecting the IC devices to be fabricated on the device layer from being damaged by the electric static discharge (ESD) and electric over stress (EOS). Furthermore, the doped region is a region of sufficient dopant concentration whereby the doped region may be used as an electrical connecting means for the IC devices to be fabricated in the device layer such that the doped region becomes a part of integration of the IC devices.

Abstract: An ion source apparatus is disclosed in this invention. The ion source apparatus includes an anode having an interior space for containing a plasma and an opening into the space. The ion source apparatus further includes a hollow cathode within the space. The ion source apparatus further includes a dopant ion-source composed of compounds comprising element selected from a group of elements consisting of silicon and germanium, the dopant ion-source disposed next to the space. The ion source apparatus further includes a voltage means connected to the anode, the hollow cathode, and the dopant ion source for discharging a plasma into the space for bombarding the dopant ion source for generating a dopant ion compound. The ion source apparatus further includes an ion-beam extracting means for extracting the dopant ion compound through the opening. In an alternate preferred embodiment, the ion source apparatus employs an electron beam device to generate the dopant ion compound.

Abstract: A semiconductor having at least one p-channel transistor (10) with shallow p-type doped source/drain regions (16 and 18) which contain boron implanted into the doped regions (16 and 18) in the form of a compound which consists of boron and an element (or elements) selected from the group which consists of element of substrate (21) and elements which forms a solid solution with the substrate (21). In particular, in the case of silicon substrate, the compound may comprise BSi2, B2Si, B4Si and B6Si. The use of such compounds enables the highly reliable contacts to be formed on the p-doped regions.

Abstract: Three process flows for manufacturing the micro-lens array substrates are disclosed. The process flows consist of two main parts. The first part of the process flows involves fabrication of a master mold. The first two process flows utilize photolithography means to print and dry etch the micro-lens array pattern on the substrate, which is covered by a oxidation or a wet etch stopping layer. The desired surface curvature corresponding to the desired size, shape, and pattern of the micro-lens array is created by either oxidizing the exposed silicon layer (in the first process flow) or to wet-etch the exposed SiO2 by using HF solutions (in the second process flow). The third process flow creates damaged areas by using a focused laser light at first. Then, the damaged areas are preferably etched by solutions, leaving the desired surface curvature.

Abstract: A semiconductor having at least one p-channel transistor (10) with shallow p-type doped source/drain regions (16 and 18) which contain boron implanted into the doped regions (16 and 18) in the form of a compound which consists of boron and an element (or elements) selected from the group which consists of element of substrate (21) and elements which forms a solid solution with the substrate (21). In particular, in the case of silicon substrate, the compound may comprise BSi2, B2Si, B4Si and B6Si. The use of such compounds enables the highly reliable contacts to be formed on the p-doped regions.

Abstract: This invention discloses a programmable read-only-memory (PROM). The PROM is formed and supported on a substrate. The PROM includes a transistor region in the substrate including a source region, a drain region and a floating gate region disposed between the drain region and the source region. The PROM further includes a floating gate formed on top of the floating gate region with a single poly layer on the substrate. The PROM further includes a floating gate extension region disposed near the transistor region, the floating gate extension region is connected with the floating gate region. The PROM further includes a control gate formed on the substrate near the floating gate extension region opposite the transistor region whereby a charge state of the floating gate extension region is controlled by the control gate.

Abstract: A method for manufacturing shallowly doped semiconductor devices. In the preferred embodiment, the method includes the steps of: (a) providing a substrate where the substrate material is represented by the symbol Es (element of the substrate); and (b) implanting the substrate with an ion compound represented by the symbol E1.sub.x Ed.sub.y, where E1 represents an element having high solubility in the substrate material with minimal detrimental chemical or electrical effects and can be the same element as the substrate element, Ed (dopant element) represents an element which is an electron acceptor or donor having high solubility limit in the substrate material, and x and y indicate the number of respective E1 and Ed atoms in the ion compound.

Abstract: The present invention discloses an inductive circuit. The inductive circuit is fabricated on a semiconductor chip including a substrate layer and a dielectric layer. The inductive circuit includes an inductive core composed of high magnetic susceptible material (HMSM) surrounded by an dielectric layer. The dielectric layer which surrounds the inductive core is further surrounded by a conductive line which includes the bottom conductive lines the conductive lines in the `vias` through the surrounding dielectric layer and the top conductive lines. The conductive lines are patterned by employing IC fabrication processes. Thus the inductive core, the dielectric layer surrounding the inductive core, and the surrounding conductive line form an inductive circuit and the inductive circuit is formed on the semi-conductor chip which includes the substrate a layer and a dieletric layer.