Patents by Inventor Peng Fan

Peng Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120315901
    Abstract: A user's context is determined based on the wireless network to which the user is connected. Targeted information, based on the determined context, is then delivered to the user. A centralized mechanism associates identifiers of wireless access points to one or more providers, such as retail establishments, that have set up those access points and have been registered by the centralized mechanism. The providers also provide targeted information that they wish to have delivered to users whose context indicates that they are in or near that provider's store. The centralized mechanism further has information associating the wireless computing device with contact information that can be utilized to deliver targeted information. The targeted information can be delivered to the user via the wireless network, a cellular network or through other communicational mechanisms. The provider, or retail establishment, can also be informed of the presence of the user near its premises.
    Type: Application
    Filed: June 13, 2011
    Publication date: December 13, 2012
    Applicant: MICROSOFT CORPORATION
    Inventors: Edward Ding-Bong Un, Henric Mattias Beermann, Kaiyan Tian, Hai Peng Fan, Jun Zhao
  • Patent number: 8289725
    Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one dielectric layer, at least one embedded capacitor, and at least one metal layer. The core circuit board has at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer. At least one dielectric layer covers the wiring layer, and the dielectric layer has at least one conductive through hole. At least one embedded capacitor is embedded in the dielectric layer. At least one metal layer covers the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: October 16, 2012
    Assignee: Unimicron Technology Corp.
    Inventor: Chih-Peng Fan
  • Patent number: 8186049
    Abstract: A manufacturing method of a circuit structure is provided as follows. Firstly, a base conductive layer is formed on the carrier board and a first patterned plating-resistant layer having at least one trench for exposing a part of the base conductive layer is formed on the base conductive layer. A first patterned conductive layer is then formed in the trench and a second patterned plating-resistant layer is formed which covers a part of the first patterned conductive layer and a part of the first patterned plating-resistant layer. A second patterned conductive layer is formed on the exposed first patterned conductive layer. The first and the second patterned plating-resistant layers and the base conductive layer exposed by the first patterned conductive layer are removed. Then, a patterned solder mask is formed for covering a part of the first patterned conductive layer.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: May 29, 2012
    Assignee: Unimicron Technology Corp.
    Inventors: Chih-Peng Fan, Yen-Ti Chia
  • Patent number: 8163232
    Abstract: A method for manufacturing functionally graded cemented tungsten carbide with hard and wear-resistant surface and tough core is described. The said functionally graded cemented tungsten carbide (WC—Co) has a surface layer having a reduced amount of cobalt. Such a hard surface and tough core structure is an example of functionally graded materials in which mechanical properties are optimized by the unique combination of wear-resistance and toughness. WC—Co with reduced-cobalt surface layer may be fabricated through a carburization heat treatment process following conventional liquid phase sintering. The graded WC—Co thus obtained contains no brittle ? phase.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: April 24, 2012
    Assignee: University of Utah Research Foundation
    Inventors: Zhigang Zak Fang, Peng Fan, Jun Guo
  • Publication number: 20120073867
    Abstract: A circuit structure suitable for being disposed on a carrier board. The circuit structure comprises a first patterned conductive layer, a second patterned conductive layer, and a solder mask. The first patterned conductive layer is disposed on the carrier board. The second patterned conductive layer is disposed on a part of the first patterned conductive layer. A part of the edge of the second patterned conductive layer and a part of the edge of the first patterned conductive layer are substantially coplanar. The patterned solder mask covers a part of the first patterned conductive layer and has at least one opening for exposing the second patterned conductive layer and a part of the first patterned conductive layer adjacent to the second patterned conductive layer.
    Type: Application
    Filed: December 7, 2011
    Publication date: March 29, 2012
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Peng Fan, Yen-Ti Chia
  • Publication number: 20120050859
    Abstract: A polarized light converting system is disclosed in the present invention. The converting system includes a polarizing splitting unit, for splitting an unpolarized incident light beam into a first polarized light beam and a second polarized light beam, passing the second polarized light beam, and reflecting the first polarized light beam; a reflector for reflecting the second polarized light beam back through the polarizing splitting unit; a condensing unit, for guiding the condensed first polarized light beam through a first area and the condensed second polarized light beam through a second area which does not overlap the first area; and a retarder unit placed at either the first area or the second area for converting the unpolarized incident light beam into polarized light beams having the same polarization state such that illumination efficiency can be increased.
    Type: Application
    Filed: August 25, 2010
    Publication date: March 1, 2012
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Ho LU, Shih-po Yeh, Peng-fan Chen
  • Publication number: 20110222024
    Abstract: An illumination system for a projection display is disclosed in the present invention. The illumination system has three light sources for providing three primary color rays, two collimators for collimating the rays into light beams, and two beam splitters for reflecting and passing the light beams to make white light available. It can also include three light sources, one collimator and three individual beam splitters. The illumination system has a compact size and low manufacturing cost. Its lighting efficiency is better than that of a conventional illumination system. Hence, it is suitable for small size projectors.
    Type: Application
    Filed: March 15, 2010
    Publication date: September 15, 2011
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Ho LU, Shih-Po Yeh, Peng-Fan Chen
  • Publication number: 20110116963
    Abstract: A method of preparing a functionally graded cemented tungsten carbide material via heat treating a sintered cemented tungsten carbide is disclosed and described. The heat treating process comprises at least a step that heats the sintered material to the multi-phase non-equilibrium temperature range in which multiple phases including solid tungsten carbide, liquid metal binder, and solid metal binder coexist. Additionally, the material, after the heat treating process comprises a surface layer with lower metal binder content than the nominal value of metal binder content of the bulk of the material.
    Type: Application
    Filed: November 19, 2009
    Publication date: May 19, 2011
    Inventors: Zhigang Z. Fang, Peng Fan, Jun Guo
  • Publication number: 20110094629
    Abstract: Processes for coating metal surfaces are disclosed and described. Applying a metal powder (24) to a metal substrate (12) under plasma transferred arc conditions can promote in-situ reaction between these materials. A substantially nonporous intermetallic alloy coating (28) can be formed in this manner and is particularly suited to Fe, Ni, and Co based intermetallic alloys.
    Type: Application
    Filed: December 31, 2008
    Publication date: April 28, 2011
    Inventors: Zhigang Zak Fang, Hong Yong Sohn, Peng Fan, Eric Riddle
  • Publication number: 20110091352
    Abstract: A light metal solid solution alloy for reversible hydrogen storage can include a light metal solid solution alloy of M1 and M2. M1 and M2 are different and independently selected from the group consisting of Li, Mg, Al, Na, Be, and Si. Furthermore, the starting materials and formation conditions are chosen such that the resulting alloy has a hydrogenated state and a dehydrogenated state which are each solid solutions.
    Type: Application
    Filed: April 9, 2010
    Publication date: April 21, 2011
    Inventors: Zhigang Z. Fang, Jun Lu, Peng Fan, Hong Yong Sohn, Young Joon Choi
  • Patent number: 7906200
    Abstract: A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: March 15, 2011
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chih-Peng Fan
  • Publication number: 20100319970
    Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one dielectric layer, at least one embedded capacitor, and at least one metal layer. The core circuit board has at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer. At least one dielectric layer covers the wiring layer, and the dielectric layer has at least one conductive through hole. At least one embedded capacitor is embedded in the dielectric layer. At least one metal layer covers the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.
    Type: Application
    Filed: August 6, 2010
    Publication date: December 23, 2010
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventor: Chih-Peng Fan
  • Publication number: 20100319973
    Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a first core circuit board, at least one embedded capacitor, a second core circuit board and a dielectric layer. The first core circuit board has at least one metal layer, and the first core circuit board has at least one first conductive through hole connected to the metal layer. At least one embedded capacitor is embedded in the first core circuit board and connected to the metal layer. The second core circuit board has at least one wiring layer, and the second core circuit board has at least one second conductive through hole connected to the wiring layer. The dielectric layer is laminated between the first core circuit board and the second core circuit board.
    Type: Application
    Filed: August 6, 2010
    Publication date: December 23, 2010
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventor: Chih-Peng Fan
  • Publication number: 20100294553
    Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one embedded capacitor, at least one dielectric layer and at least one wiring layer. The core circuit board has at least one metal layer, and the core circuit board has at least one conductive through hole connected to the metal layer. At least one embedded capacitor is embedded in the core circuit board and connected to the metal layer. At least one dielectric layer covers the core circuit board, and the dielectric layer has an embedded hole. At least one wiring layer covers the dielectric layer and connected to the embedded hole.
    Type: Application
    Filed: August 6, 2010
    Publication date: November 25, 2010
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventor: Chih-Peng Fan
  • Patent number: 7789936
    Abstract: Methods and systems for removing copper from ferrous scrap are described. Some amounts of copper in ferrous scrap are removed by oxidation and subsequent mechanical impact of the oxidized scrap. Further removal of copper from the solid scrap can be achieved by fluxing the copper oxide below the melting point of ferrous scrap using CaO—SiO2—B2O3— and Na2O—SiO2—B2O3-based slags. Using the invention, copper can be removed from ferrous scrap in a natural, cost-effective, and environmental-friendly manner.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: September 7, 2010
    Assignee: University of Utah Research Foundation
    Inventors: Weol Dong Cho, Peng Fan
  • Publication number: 20100215927
    Abstract: A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.
    Type: Application
    Filed: April 15, 2009
    Publication date: August 26, 2010
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chih-Peng Fan
  • Patent number: 7772625
    Abstract: A semiconductor structure includes a transistor formed over a substrate. The transistor includes a transistor gate and at least one source/drain region. The semiconductor structure includes a pre-determined region coupled to the transistor. The semiconductor structure further includes a resist protection oxide (RPO) layer formed over the pre-determined region, wherein the RPO layer has a level of nitrogen of about 0.35 atomic % or less.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: August 10, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao Hsiang Liang, Wen-Kung Cheng, Chen-Peng Fan, Ming-Hsien Chen, Richard Chen, Jung-Chen Yang, Wen-Yu Ho, Chao-Keng Li, Yong-Sin Chang, Labo Chang
  • Publication number: 20100101368
    Abstract: A method for manufacturing functionally graded cemented tungsten carbide with hard and wear-resistant surface and tough core is described. The said functionally graded cemented tungsten carbide (WC—Co) has a surface layer having a reduced amount of cobalt. Such a hard surface and tough core structure is an example of functionally graded materials in which mechanical properties are optimized by the unique combination of wear-resistance and toughness. WC—Co with reduced-cobalt surface layer may be fabricated through a carburization heat treatment process following conventional liquid phase sintering. The graded WC—Co thus obtained contains no brittle ? phase.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 29, 2010
    Inventors: Zhigang Zak Fang, Peng Fan, Jun Guo
  • Patent number: 7700986
    Abstract: A chip package carrier is disclosed, which includes a first circuit layer, a second circuit layer, a core layer, a third circuit layer, a first dielectric layer between the first and third circuit layers, a fourth conductive layer including at least a solder ball pad, a second dielectric layer between the second and fourth circuit layers and at least a capacitor device, wherein the core layer has at least a first through-hole; the third circuit layer is disposed above the first circuit layer and includes at least a die pad; the capacitor device is disposed in the first through-hole. The capacitor device herein includes a first pillar electrode covering the wall of the first through-hole, a cylindrical capacitor material disposed in the first pillar electrode and having a first blind hole, and a second pillar electrode disposed in the first blind hole and connected to the die pad.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: April 20, 2010
    Assignee: Unimicron Technology Corp.
    Inventors: Han-Pei Huang, Chih-Peng Fan
  • Publication number: 20100044083
    Abstract: A method of manufacturing a build-up printed circuit board structure for increasing fine circuit density includes providing a core carrier board; forming a plurality of first conductive pads on a top surface of the core carrier board; forming a first dielectric layer on the core carrier board in order to cover the first conductive pads; drilling the first dielectric layer to form a patterned first electroplated layer on the first dielectric layer; forming a second dielectric layer, and the first dielectric layer and the patterned first electroplated layer being covered by the second dielectric layer; drilling the second dielectric layer and the first dielectric layer to form a patterned second electroplated layer on the second dielectric layer; and forming a third dielectric layer, and the second dielectric layer and the patterned second electroplated layer being covered by the third dielectric layer; and removing the core carrier board.
    Type: Application
    Filed: February 5, 2009
    Publication date: February 25, 2010
    Inventor: Chih-Peng Fan