Patents by Inventor Peter George Hartwell

Peter George Hartwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120281980
    Abstract: Various embodiments of the present invention are directed to sensor networks and to methods for fabricating sensor networks. In one aspect, a sensor network includes a processing node (110, 310), and one or more sensor lines (102,202,302) optically coupled to the processing node. Each sensor line comprises a waveguide (116,216,316), and one or more sensor nodes (112,210). Each sensor node is optically coupled to the waveguide and configured to measure one or more physical conditions and, encode measurement results in one or more wavelengths of light carried by the waveguide to the processing node.
    Type: Application
    Filed: January 29, 2010
    Publication date: November 8, 2012
    Inventors: Hans S. Cho, Alexandre M. Bratkovski, R. Stanley Williams, Peter George Hartwell
  • Patent number: 8272266
    Abstract: Gyroscopes using surface electrodes are provided. In this regard, a representative microelectromechanical systems (MEMS) gyroscope, among others, includes a top substrate and a bottom substrate. The top substrate includes an outermost structure that is open and enclosed and a first driving structure that is disposed within the outermost structure and includes first driving electrodes disposed on a bottom surface. The bottom substrate is disposed below the top substrate and includes second driving electrodes disposed on a top surface of the bottom substrate. The second driving electrodes are substantially aligned below the first driving electrodes such that a force can be applied to the first driving structure by an electrostatic force generated between the first and second driving electrodes. The first and second driving electrodes are also configured to provide a capacitance signal based on the movement of the first driving structure.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: September 25, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wenhua Zhang, Peter George Hartwell, Lennie K Kiyama, Robert G Walmsley
  • Publication number: 20110317154
    Abstract: Various embodiments of the present invention are directed to systems and methods for determining coordinate locations of sensor nodes of a sensor network. In one aspect, a method determines three-dimensional coordinates of a reference location in a terrain over which the sensor network is deployed. Beginning with the reference location, the method tracks the movement of an optical sensor as the optical sensor moves to each sensor node in series and determines a three-dimensional coordinate of each sensor node relative to the reference location based on data collected by the optical sensor. The method also programs the three-dimensional coordinate into each sensor node.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Inventors: Michael Renne Ty Tan, Peter George Hartwell
  • Patent number: 7966880
    Abstract: Encapsulated devices that can adjust the damping level within are provided. In this regard, a representative encapsulated device, among others, comprises a bottom substrate, a middle substrate that is disposed above the bottom substrate, and a top substrate that is disposed above the middle substrate. The middle substrate comprises an outermost structure and at least one damping device. The at least one damping device is supported to the outermost structure. At least one top gap and a bottom gap are formed between the at least one damping device and the top and bottom substrates, respectively. The at least one top gap has at least one cavity depth that is adapted to adjust the damping level of the encapsulated device.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: June 28, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wenhua Zhang, Robert G. Walmsley, Peter George Hartwell
  • Publication number: 20110018561
    Abstract: A capacitive sensor includes first and second variable capacitor electrode sets, respectively disposed upon a planar support surface and a proof mass that is compliantly displaceable along a first axis substantially parallel to the planar support surface. The first electrode set produces a cyclic variation in capacitance over a range of displacement of the proof mass along the first axis, and the second electrode set produces an absolute capacitance variation throughout the range of displacement along the first axis.
    Type: Application
    Filed: March 26, 2008
    Publication date: January 27, 2011
    Applicant: HEWLETT-PACKARD COMPANY
    Inventors: Peter George Hartwell, Robert G. Walmsley
  • Publication number: 20100257934
    Abstract: Gyroscopes using surface electrodes are provided. In this regard, a representative microelectromechanical systems (MEMS) gyroscope, among others, includes a top substrate and a bottom substrate. The top substrate includes an outermost structure that is open and enclosed and a first driving structure that is disposed within the outermost structure and includes first driving electrodes disposed on a bottom surface. The bottom substrate is disposed below the top substrate and includes second driving electrodes disposed on a top surface of the bottom substrate. The second driving electrodes are substantially aligned below the first driving electrodes such that a force can be applied to the first driving structure by an electrostatic force generated between the first and second driving electrodes. The first and second driving electrodes are also configured to provide a capacitance signal based on the movement of the first driving structure.
    Type: Application
    Filed: April 9, 2009
    Publication date: October 14, 2010
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Wenhua Zhang, Peter George Hartwell, Lennie K. Kiyama, Robert G. Walmsley
  • Publication number: 20100089153
    Abstract: Encapsulated devices that can adjust the damping level within are provided. In this regard, a representative encapsulated device, among others, comprises a bottom substrate, a middle substrate that is disposed above the bottom substrate, and a top substrate that is disposed above the middle substrate. The middle substrate comprises an outermost structure and at least one damping device. The at least one damping device is supported to the outermost structure. At least one top gap and a bottom gap are formed between the at least one damping device and the top and bottom substrates, respectively. The at least one top gap has at least one cavity depth that is adapted to adjust the damping level of the encapsulated device.
    Type: Application
    Filed: October 13, 2008
    Publication date: April 15, 2010
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Wenhua Zhang, Robert G. Walmsley, Peter George Hartwell
  • Publication number: 20090152702
    Abstract: A first device has a surface and includes a micrometer-scale or smaller geometry doped semiconductor region extending along the surface. A second device has a surface opposite the surface of the first device and includes a micrometer-scale or smaller wire extending through the second device to a position in proximity to the surface of the second device. The first and second devices are displaceable between first and second positions relative to each other. The wire is not substantially electrically coupled to the doped semiconductor region in the first position and the wire is substantially electrically coupled to the doped semiconductor region in the second position. A potential applied to the wire affects the conductivity of the doped semiconductor region in the second position.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 18, 2009
    Inventors: Carl E. Picciotto, Peter George Hartwell
  • Patent number: 7521784
    Abstract: A first device has a surface and includes a micrometer-scale or smaller geometry doped semiconductor region extending along the surface. A second device has a surface opposite the surface of the first device and includes a micrometer-scale or smaller wire extending through the second device to a position in proximity to the surface of the second device. The first and second devices are displaceable between first and second positions relative to each other. The wire is not substantially electrically coupled to the doped semiconductor region in the first position and the wire is substantially electrically coupled to the doped semiconductor region in the second position. A potential applied to the wire affects the conductivity of the doped semiconductor region in the second position.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: April 21, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carl E. Picciotto, Peter George Hartwell
  • Patent number: 7503989
    Abstract: A first device has a micrometer-scale or smaller first structure and is flexibly coupled to a first substrate. A second device has a micrometer-scale or smaller second structure and is coupled to a second substrate. At least one actuator displaces at least one of the first and second devices relative to the other in response to a control signal. The control signal is generated by a controller to align the first and second structures and to control the at least one actuator to connect the displaced first and second devices.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: March 17, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carl E. Picciotto, Peter George Hartwell
  • Patent number: 7429864
    Abstract: A first device has a surface and includes a plurality of at largest micrometer-scale geometry structures extending along its surface. The structures have a first portion and a second portion. A plurality of at largest micrometer-scale geometry conductors are coupled to the first portion of respective structures. A converter converts a signal in the first portion of the structures to a substantially direct current signal in the respective second portion. A sensor detects a level of a signal coupled from one of the conductors to a respective one of the structures.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: September 30, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carl E. Picciotto, Peter George Hartwell
  • Patent number: 7391090
    Abstract: A first device includes a micrometer-scale or smaller geometry first conductor. A second device includes a micrometer-scale or smaller second conductor. An actuator the first and second devices relative to each other between first and second positions. Signals are substantially coupled between the first and second conductors in the first position and not in the second position.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: June 24, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carl E. Picciotto, Peter George Hartwell
  • Patent number: 7115505
    Abstract: Systems for electrically isolating portions of wafers are provided. A representative system includes a first wafer and a first conductor formed at least partially through the first wafer. A first conductor insulating layer is formed at least partially through the first wafer. The first conductor insulating layer engages the first conductor and is disposed between the first conductor and material of the first wafer. A first outer insulating layer also is provided that is formed at least partially through the first wafer. The first outer insulating layer is spaced from the first conductor insulating layer. Both the first conductor insulating layer and the first outer insulating layer are formed of dielectric material. Methods also are provided.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: October 3, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Peter George Hartwell
  • Publication number: 20040192029
    Abstract: Systems for electrically isolating portions of wafers are provided. A representative system includes a first wafer and a first conductor formed at least partially through the first wafer. A first conductor insulating layer is formed at least partially through the first wafer. The first conductor insulating layer engages the first conductor and is disposed between the first conductor and material of the first wafer. A first outer insulating layer also is provided that is formed at least partially through the first wafer. The first outer insulating layer is spaced from the first conductor insulating layer. Both the first conductor insulating layer and the first outer insulating layer are formed of dielectric material. Methods also are provided.
    Type: Application
    Filed: April 12, 2004
    Publication date: September 30, 2004
    Inventor: Peter George Hartwell
  • Patent number: 6750516
    Abstract: Systems for electrically isolating portions of wafers are provided. A representative system includes a first wafer and a first conductor formed at least partially through the first wafer. A first conductor insulating layer is formed at least partially through the first wafer. The first conductor insulating layer engages the first conductor and is disposed between the first conductor and material of the first wafer. A first outer insulating layer also is provided that is formed at least partially through the first wafer. The first outer insulating layer is spaced from the first conductor insulating layer. Both the first conductor insulating layer and the first outer insulating layer are formed of dielectric material. Methods also are provided.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: June 15, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Peter George Hartwell
  • Publication number: 20030077877
    Abstract: Systems for electrically isolating portions of wafers are provided. A representative system includes a first wafer and a first conductor formed at least partially through the first wafer. A first conductor insulating layer is formed at least partially through the first wafer. The first conductor insulating layer engages the first conductor and is disposed between the first conductor and material of the first wafer. A first outer insulating layer also is provided that is formed at least partially through the first wafer. The first outer insulating layer is spaced from the first conductor insulating layer. Both the first conductor insulating layer and the first outer insulating layer are formed of dielectric material. Methods also are provided.
    Type: Application
    Filed: October 18, 2001
    Publication date: April 24, 2003
    Inventor: Peter George Hartwell