Patents by Inventor Pierre M. Petroff

Pierre M. Petroff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8227825
    Abstract: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the light emitted from the PES, and photonic crystals, wherein the photonic crystals act as diffraction gratings to provide high light extraction efficiency, to provide efficient excitation of the SES, and/or to modulate the far-field emission pattern.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: July 24, 2012
    Assignee: The Regents of the University of California
    Inventors: Frederic S. Diana, Aurelien J. F. David, Pierre M. Petroff, Claude C. A. Weisbuch
  • Publication number: 20110291130
    Abstract: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the light emitted from the PES, and photonic crystals, wherein the photonic crystals act as diffraction gratings to provide high light extraction efficiency, to provide efficient excitation of the SES, and/or to modulate the far-field emission pattern.
    Type: Application
    Filed: August 1, 2011
    Publication date: December 1, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Frédéric S. Diana, Aurélien J. F. David, Pierre M. Petroff, Claudr C.A. Weisbuch
  • Patent number: 7906775
    Abstract: Fabrication of metallic or non-metallic wires with nanometer widths and nanometer separation distances without the use of lithography. Wires are created in a two-step process involving forming the wires at the desired dimensions and transferring them to a planar substrate. The dimensions and separation of the wires are determined by the thicknesses of alternating layers of different materials that are in the form of a superlattice. Wires are created by evaporating the desired material onto the superlattice that has been selectively etched to provide height contrast between layers. The wires thus formed upon one set of superlattice layers are then transferred to a substrate.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: March 15, 2011
    Assignee: California Institute of Technology
    Inventors: James R. Heath, Pierre M. Petroff, Nicholas A. Melosh
  • Publication number: 20100327305
    Abstract: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the light emitted from the PES, and photonic crystals, wherein the photonic crystals act as diffraction gratings to provide high light extraction efficiency, to provide efficient excitation of the SES, and/or to modulate the far-field emission pattern.
    Type: Application
    Filed: July 28, 2010
    Publication date: December 30, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Frédéric S. Diana, Aurélien J.F. David, Pierre M. Petroff, Claude C.A. Weisbuch
  • Publication number: 20100258785
    Abstract: Fabrication of metallic or non-metallic wires with nanometer widths and nanometer separation distances without the use of lithography. Wires are created in a two-step process involving forming the wires at the desired dimensions and transferring them to a planar substrate. The dimensions and separation of the wires are determined by the thicknesses of alternating layers of different materials that are in the form of a superlattice. Wires are created by evaporating the desired material onto the superlattice that has been selectively etched to provide height contrast between layers. The wires thus formed upon one set of superlattice layers are then transferred to a substrate.
    Type: Application
    Filed: December 4, 2006
    Publication date: October 14, 2010
    Applicant: California Institute of Technology
    Inventors: James R. Heath, Pierre M. Petroff, Nicholas A. Melosh
  • Patent number: 7768023
    Abstract: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the light emitted from the PES, and photonic crystals, wherein the photonic crystals act as diffraction gratings to provide high light extraction efficiency, to provide efficient excitation of the SES, and/or to modulate the far-field emission pattern.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: August 3, 2010
    Assignee: The Regents of the University of California
    Inventors: Frédéric S. Diana, Aurélien J. F. David, Pierre M. Petroff, Claude C. A. Weisbuch
  • Patent number: 7470954
    Abstract: A method and resultant device, in which metal nanoparticles are self-assembled into two-dimensional lattices. A periodic hole pattern (wells) is fabricated on a photoresist substrate, the wells having an aspect ratio of less than 0.37. The nanoparticles are synthesized within inverse micelles of a polymer, preferably a block copolymer, and are self-assembled onto the photoresist nanopatterns. The nanoparticles are selectively positioned in the holes due to the capillary forces related to the pattern geometry, with a controllable number of particles per lattice point.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: December 30, 2008
    Assignee: The Regents of the University of California
    Inventors: Seung-Heon Lee, Frédéric S. Diana, Antonio Badolato, Pierre M. Petroff, Edward J. Kramer
  • Patent number: 7161168
    Abstract: Fabrication of metallic or non-metallic wires with nanometer widths and nanometer separation distances without the use of lithography. Wires are created in a two-step process involving forming the wires at the desired dimensions and transferring them to a planar substrate. The dimensions and separation of the wires are determined by the thicknesses of alternating layers of different materials that are in the form of a superlattice. Wires are created by evaporating the desired material onto the superlattice that has been selectively etched to provide height contrast between layers. The wires thus formed upon one set of superlattice layers are then transferred to a substrate.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: January 9, 2007
    Assignee: The Regents of the University of California
    Inventors: James R. Heath, Pierre M. Petroff, Nicholas A. Melosh
  • Patent number: 6989324
    Abstract: A method and resultant device, in which metal nanoparticles are self-assembled into two-dimensional lattices. A periodic hole pattern (wells) is fabricated on a photoresist substrate, the wells having an aspect ratio of less than 0.37. The nanoparticles are synthesized within inverse micelles of a polymer, preferably a block copolymer, and are self-assembled onto the photoresist nanopatterns. The nanoparticles are selectively positioned in the holes due to the capillary forces related to the pattern geometry, with a controllable number of particles per lattice point.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: January 24, 2006
    Assignee: The Regents of the University of California
    Inventors: Seung-Heon Lee, Frédéric S. Diana, Antonio Badolato, Pierre M. Petroff, Edward J. Kramer
  • Patent number: 6583436
    Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: June 24, 2003
    Assignee: The Regents of the University of California
    Inventors: Pierre M. Petroff, James S. Speck, Jo Anna Johnson, Hao Lee
  • Patent number: 6541788
    Abstract: A method and device for converting light from a first wavelength to a second wavelength. The method comprises the steps of exciting an electron in a quantum dot with an incident infrared photon having the first wavelength, the excited electron having a first energy, tunneling the excited electron through a barrier into a stress induced quantum dot, and recombining the excited electron with a hole in the stress induced quantum dot, therein producing a photon having the second wavelength, typically in the visible range.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: April 1, 2003
    Assignee: The Regents of the University of California
    Inventors: Pierre M. Petroff, Naoto Horiguchi
  • Publication number: 20020162995
    Abstract: A method and device for converting light from a first wavelength to a second wavelength. The method comprises the steps of exciting an electron in a quantum dot with an incident infrared photon having the first wavelength, the excited electron having a first energy, tunneling the excited electron through a barrier into a stress induced quantum dot, and recombining the excited electron with a hole in the stress induced quantum dot, therein producing a photon having the second wavelength, typically in the visible range.
    Type: Application
    Filed: October 27, 1999
    Publication date: November 7, 2002
    Inventors: PIERRE M. PETROFF, NAOTO NMI HORIGUCHI
  • Publication number: 20020074543
    Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.
    Type: Application
    Filed: June 27, 2001
    Publication date: June 20, 2002
    Inventors: Pierre M. Petroff, James S. Speck, Jo Anna Johnson, Hao Lee
  • Patent number: 6307241
    Abstract: Submicron ferromagnets, of selected size and spacing, are introduced into semiconductor by means of ion implantation and subsequent heat treatments. The resulting semiconductor contains ferromagnets at high density and which exhibit Curie temperatures exceeding room temperature. The semiconductor retains its intrinsic physical properties, such as optical and transport properties, after incorporation of the ferromagnetic nanostructures.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 23, 2001
    Assignee: The Regents of the Unversity of California
    Inventors: David D. Awschalom, Pierre M. Petroff, Jing Shi, James M. Kikkawa
  • Patent number: 5192709
    Abstract: A method for modulation doping of semiconductor heterostructures includes forming a semiconductor heterostructure comprising a substrate layer, a narrow band-gap quantum well layer, and a donor implantation layer. A focused ion beam writes across the surface of the donor implantation layer, at a maximum angle of incident less than that of the channeling half-angle .alpha. of the donor implantation layer. Channeled dopant ions penetrate deep within the donor implantation layer, far from surface damage sites, and away from the quantum well layer. The addition of a dechanneling layer within the donor implantation layer, and of a series of spacer layers, further localizes the implanted donor ions and separates these ions from the quantum well layer. Once activated by a thermal annealing process, the donor ions release carriers into the quantum well layer where carrier mobility is unimpeded by donor ion collisions. An alternative embodiment implants the donor ions before the heterostructure is completely formed.
    Type: Grant
    Filed: September 17, 1991
    Date of Patent: March 9, 1993
    Assignee: University of California Office of Technology Transfer
    Inventor: Pierre M. Petroff
  • Patent number: 5013683
    Abstract: A method for growing a superlattice structure on a substrate. First, a periodic array of monoatomic surface steps are created on the surface of the substrate at an area to have the superlattice structure grown thereon. There is apparatus for creating a beam of a material being input thereto and for selectively including or not including respective ones of a plurality of materials within the beam. The beam is directed at the steps of the substrate. Finally, logic causes control apparatus to include and not include respective ones of the materials within the beam in a pre-established pattern of time periods which will cause the materials to be deposited on the steps in a series of stacked monolayers. Tilted Superlattices (TSLs) and Coherent Tilted Superlattices (CTSLs) are created. The method can create pseudo ternary semiconductor alloys as part of a CTSL by employing at least two binary compound semiconductor alloys in the deposition process.
    Type: Grant
    Filed: January 23, 1989
    Date of Patent: May 7, 1991
    Assignee: The Regents of the University of California
    Inventors: Pierre M. Petroff, Herbert Kroemer
  • Patent number: 4860068
    Abstract: Single GaAs quantum well or single GaAs active layer or single reverse interface structures with Al.sub.x Ga.sub.1-x As barrier layers have improved qualities when one or more narrow bandgap GaAs getter-smoothing layers, which are thin, are grown and are incorporated in the barrier layer before and in close proximity to the active layer.
    Type: Grant
    Filed: January 27, 1988
    Date of Patent: August 22, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Arthur C. Gossard, Robert C. Miller, Pierre M. Petroff
  • Patent number: 4794440
    Abstract: A heterojunction bipolar transistor having means for changing carrier transport properties is described.
    Type: Grant
    Filed: December 30, 1987
    Date of Patent: December 27, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell laboratories
    Inventors: Federico Capasso, Arthur C. Gossard, John R. Hayes, Roger J. Malik, Pierre M. Petroff
  • Patent number: 4751194
    Abstract: A method of fabricating quantum well wires and boxes is described in which interdiffusion in a semiconductor having a compositional profile is enhanced by the presence of defects created by ion implantation in localized regions.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: June 14, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Joel B. Cibert, Arthur C. Gossard, Stephen J. Pearton, Pierre M. Petroff
  • Patent number: 4591889
    Abstract: Semiconductor devices having submonolayer superlattices are described. These devices may have periodic compositional variations in a direction parallel to the substrate surface as well as in the perpendicular direction. Such superlattices are useful in numerous types of devices including lasers, transistors, etc.
    Type: Grant
    Filed: September 14, 1984
    Date of Patent: May 27, 1986
    Assignee: AT&T Bell Laboratories
    Inventors: Arthur C. Gossard, Pierre M. Petroff