Abstract: A method to enhance images, including: receiving, in an image processing logic circuit in an integrated circuit device, first data representative of an input image; generating, by the image processing logic circuit, input data for an inference logic circuit in the integrated circuit device; generating, by the inference logic circuit, a column of bits from the input data; performing, by the inference logic circuit using memory cells in the integrated circuit device having threshold voltages programmed to represent at least one weight matrix, operations of multiplication and accumulation, via reading concurrently rows of the memory cells selected according to the column of bits; generating, by the inference logic circuit, output data based on results of the operations multiplication and accumulation; and generating, by the image processing logic circuit using the output data, second data representative of an output image enhanced from the input image.

Abstract: A device configured with redundant computations to improve reliability of using memory cells to perform operations of multiplication and accumulation. The device can have a memory cell array and a logic circuit. Each respective memory cell in the memory cell array has a threshold voltage programmable in a first mode to perform operations of multiplication and accumulation and programmable in a second mode, different from the first mode, to store data. The memory cell array has a plurality of regions operable in parallel to perform redundant operations of multiplication and accumulation. The logic circuit is configured to compare a plurality of results, generated from the redundant operations of multiplication and accumulation performed using the plurality of regions respectively, to select an output result from the plurality of results.

Abstract: A surveillance camera having: an image sensing pixel array operable to generate first data representative of an input image; a memory cell array having memory cells, wherein threshold voltages of the memory cells are programmable in a first mode to store weight matrices and programmable in a second mode to store second data representative of an output image generated from the input image; voltage drivers; current digitizers; an inference logic circuit operable to perform operations of multiplication and accumulation using the voltage drivers, the current digitizers, and a first portion of the memory cells programmed in the first mode to store the weight matrices used in generation of the output image; a transceiver; and a microprocessor configured to use the transceiver to communicate, to a computer system, a report identifying the output image stored in the memory cell array.

Abstract: An integrated circuit device having a memory cell array with first layers of memory cells configured for operations of multiplication and accumulation. Each pair of closest layers among the first layers are configured to be separate by at least one layer in second layers of memory cells, where access to, or usages of, the second layers can be restricted or limited to prevent activities in the second layers from corrupting the weight programming in the first layers.

Abstract: After data to be written to a storage device, such as a solid state drive (SSD), is received from a host system, the received data is encoded using a first error correction code to generate first parity data. A temperature at which memory cells of the storage device will store the received data is determined. In response, a first portion of the received data is identified (e.g., data in memory storage that is error-prone at a predicted higher temperature that has been determined based on output from an artificial neural network using sensor(s) input). The first portion is encoded using a second error correction code to generate second parity data. The second error correction code has a higher error correction capability than the first error correction code. The encoded first portion, the first parity data, and the second parity data are stored in the memory cells.

Abstract: An integrated circuit device including: a first integrated circuit die having an image sensing pixel array; a second integrated circuit die having an image processing logic circuit and an inference logic circuit; and a third integrated circuit die having a memory cell array. The second integrated circuit die and the third integrated circuit die are connected via a direct bond interconnect. The inference logic circuit is configured to process an image from the image sensing pixel array via multiplication and accumulation operations based on memory cells in the memory cell array having threshold voltages programmed to store data in multiplications and output currents from the memory cells connected to lines in summations.

Abstract: A method in an integrated circuit device to compress images, including: generating, by an image processing logic circuit and based on first data representative of an input image, input data; generating, by an inference logic circuit and based on the input data, a column of inputs; converting, by the inference logic circuit using voltage drivers connected to wordlines and memory cells storing a weight matrix, and into output currents of the memory cells summed in bitlines, results of bitwise multiplications of bits in the column of inputs and bits stored in the memory cells in a form of threshold voltages of the memory cells; digitizing currents summed in the bitlines to obtain column outputs; generating, by the inference logic circuit, output data based on the column outputs; and generating, using the output data, second data representative of an output image compressed from the input image.

Abstract: A method for a digital camera adaptable to monitor a scene to detect a condition of interest to a user. The digital camera can program, in a first mode, first memory cells according to first weight matrices to classify images captured by the digital camera. Second memory cells are programmed in a second mode to store data representative of the images. The digital camera can perform operations of multiplication and accumulation using the first memory cells to compute first classifications of the images. In response to mismatches between the first classifications and second classifications identified by the user for the images, the digital camera can execute instructions to determine second weight matrices and program, in the first mode, third memory cells, according to the second weight matrices for improved capability in detecting the condition represented by image classifications in a predetermined category.

Abstract: A method to balance computation accuracy and energy consumption, including: programming thresholds voltages of first memory cells to store first weight matrices representative of a first artificial neural network; programming thresholds voltages of second memory cells to store second weight matrices representative of a second artificial neural network smaller than the first artificial neural network, where both the first artificial neural network and the second artificial neural network are operable to provide at least one common functionality in processing each of the inputs; selecting configurations of using the first memory cells, or the second memory cells, or both in processing a sequence of inputs; and performing, according to the configurations, operations of multiplication and accumulation using the first memory cells, and the second memory cells in computations of the first artificial neural network and the second artificial neural network in processing the sequence of the inputs.

Abstract: A system includes a data storage device and a host computing device. The data storage device includes a host interface; integrated circuit memory cells; and a processing device. The processing device is configured to execute firmware to perform operations requested by commands received via the host interface and maintenance operations identified by the processing device independent of commands received via the host interface. The host computing device is coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address. In response to a request, the host computing device is configured to reduce, to below a threshold, a rate of transmitting to the host interface commands to access integrated circuit memory cells; and power up the data storage device to cause the data storage device to perform the maintenance operations.

Abstract: In some implementations, an extended reality (XR) device may receive, via an interface of the XR device, an input associated with meals of a user associated with the XR device. The XR device may determine, based on the input, a meal plan for the user of the XR device, wherein the meal plan is associated with target meals. The XR device may determine, based on recipes for the target meals, a list of food items for preparing the target meals associated with the meal plan. The XR device may provide, via the interface, the list of food items and the target meals. The XR device may provide, via the interface, an in-store navigation path to direct the user of the XR device via overlayed audio-visual cues to locations within a physical retail store to pick up the food items.

Abstract: In some implementations, an extended reality (XR) device may detect, using a scene captured by the XR device, text associated with a document, wherein the text associated with the document is within a field of view of the XR device. The XR device may determine one or more keywords of the text and a context associated with the text. The XR device may generate, using a language model, predicted text based on the one or more keywords of the text and the context associated with the text, wherein the predicted text is related to the text associated with the document. The XR device may provide, via an interface of the XR device, the predicted text as a visual overlay to the text associated with the document, wherein the predicted text is visually overlayed in proximity to the text associated with the document.

Abstract: Systems, methods and apparatuses of predictive maintenance of automotive transmission of vehicles. For example, the transmission has at least one sensor to measure a temperature in transmission fluid, the torque applied on a shaft of the transmission, a vibration sensor, and/or a microphone. During a period in which the vehicle is assumed to be operating normally, the sensor data generated by the transmission sensor(s) is used to train an artificial neural network to recognize the normal patterns in the sensor data. Subsequently, the trained artificial neural network is used to determine whether the current sensor data from the transmission sensor(s) are abnormal. A maintenance alert can be generated for the vehicle in response to a determination that the operations of the transmission are abnormal according to the artificial neural network and the current sensor data.

Abstract: In some implementations, an extended reality (XR) device may detect, using a camera of the XR device, a clothing item, wherein the clothing item is associated with an identifier. The XR device may transmit, to a server, a request that indicates the identifier. The XR device may receive, from the server, metadata associated with the clothing item, wherein the metadata is associated with the identifier. The XR device may retrieve, from the server, a three-dimensional model of a user associated with the XR device. The XR device may generate a three-dimensional model of the user wearing the clothing item using the three-dimensional model of the user and the metadata. The XR device may provide, via an interface of the XR device, the three-dimensional model of the user wearing the clothing item.

Abstract: In some implementations, an extended reality (XR) device may receive, via an interface of the XR device, an indication of items to be purchased. The XR device may identify one or more physical retail stores that carry the items. The XR device may identify one or more recommended items based on the theme. The XR device may provide, via the interface, a list of the one or more physical retail stores. The XR device may detect that the XR device is within a physical retail store, of the one or more physical retail stores, based on a geographic location associated with the XR device. The XR device may provide, via the interface, an in-store navigation path to direct a user of the XR device via overlayed audio-visual cues to locations within the physical retail store at which the items are held.

Abstract: In some implementations, an extended reality (XR) device may receive, from a server, a request to resolve an item that is misplaced in a physical retail store, wherein the request indicates a misplaced location associated with the item. The XR device may provide, via an interface, a notification of the request, wherein the notification includes an option to accept the request. The XR device may receive, via the interface, an indication that the request has been accepted. The XR device may transmit, to the server, the indication that the request has been accepted. The XR device may provide, via the interface, an in-store navigation path to direct a user of the XR device via overlayed audio-visual cues to the misplaced location to pick up the item.

Abstract: Methods, systems, and apparatus related to dynamic distribution of an artificial neural network among multiple processing nodes based on real-time monitoring of a processing load on each node. In one approach, a server acts as an intelligent artificial intelligence (AI) gateway. The server receives data regarding a respective operating status for each of monitored processing devices. The monitored processing devices perform processing for an artificial neural network (ANN). The monitored processing devices each perform processing for a portion of the neurons in the ANN. The portions are distributed in response to monitoring the processing load on each processing device (e.g., to better utilize processing power across all of the processing devices).

Abstract: A solid state drive having a drive aggregator and a plurality of component solid state drive, including a first component solid state drive and a second component solid state drive. The drive aggregator has at least one host interface, and a plurality of drive interfaces connected to the plurality of component solid state drives. The drive aggregator is configured to generate, in the second solid state drive, a copy of a dataset that is stored in the first component solid state drive. In response to a failure of the first component solid state drive, the drive aggregator is configured to substitute a function of the first component solid state drive with respect to the dataset with a corresponding function of the second component solid state drive, based on the copy of the dataset generated in the second component solid state drive.

Abstract: A device having a plurality of pins configured to connect circuits within an integrated circuit package to circuits outside of the integrated circuit package. A driver enclosed within the package is programmable to generate a spread spectrum signal to represent data being transmitted from a pin of the device. Frequency distribution of the signal spreading over a bandwidth in a frequency domain can be programmed to customize the electromagnetic emission caused by the communication of data through the pin. The frequency spreading can be programmed to reduce energy consumption, electromagnetic interference, and/or errors in receiving the data transmitted via the pin. The settings can be programmed into registers enclosed in the integrated circuit package to control the driver and/or dynamically adjusted using an artificial intelligent engine to optimize a cost function.

Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to a direct memory access controller. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the direct memory access controller may concurrently load next input into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory.