Abstract: Apparatuses and methods can be related to implementing age-based network training. An artificial neural network (ANN) can be trained by introducing errors into the ANN. The errors and the quantity of errors introduced into the ANN can be based on age-based characteristics of the memory device.

Abstract: A solid state drive having a drive aggregator and multiple component solid state drives. Different component solid state drives in solid state drive are configured with different optimizations of memory/storage operations. An address map in the solid state drive is used by the drive aggregator to host different namespaces in the component solid state drives based on optimization requirements of the namespaces and based on the optimizations of memory operations that have been implement in the component solid state drives.

Abstract: Systems, methods and apparatus of intelligent write-amplification reduction for data storage devices configured on autonomous vehicles. For example, a data storage device of a vehicle includes: one or more storage media components; a controller configured to store data into and retrieve data from the one or more storage media components according to commands received in the data storage device; an address map configured to map between: logical addresses specified in the commands received in the data storage device, and physical addresses of memory cells in the one or more storage media components; and an artificial neural network configured to receive, as input and as a function of time, operating parameters indicative a data access pattern, and generate, based on the input, a prediction to determine an optimized data placement scheme. The controller is configured to adjust the address map according to the optimized data placement scheme.

Abstract: Systems, devices, and methods related to a deep learning accelerator and memory are described. For example, a wearable electronic device may be configured to execute instructions with matrix operands and configured with: a housing to be worn on a person; a sensor having one or more sensor elements generate measurements associated with the person; random access memory to store instructions executable by the deep learning accelerator and store matrices of an artificial neural network; a transceiver; and a controller to monitor an output of the artificial neural network, generated using the measurements as an input to the artificial neural network. Based on the output, the controller may control selective storage of measurement data from the sensor, and/or selective communication of data from the wearable electronic device to a separate computer system.

Abstract: Systems, methods and apparatus of communications with a data storage device in neural network computations. For example, a vehicle can have a set of sensors configured to generate a sensor data stream for predictive Maintenance. One or more processors of the vehicle generates inputs to artificial neurons based on the sensor data. The inputs are written into the data storage device, which is configured with a neural network accelerator and stores model data of an artificial neural network (ANN). The neural network accelerator applies the inputs to the ANN to generate outputs. The data storage device reports the availability of the outputs (e.g., using a response to the request to write the inputs into the data storage device). The processor(s) of the vehicle can selectively read the outputs from the data storage device and/or request the data storage device to store the outputs from buffer to non-volatile memory.

Abstract: Systems, methods and apparatuses to classify and/or control content passing through a memory device. For example, a portion of a media stream received from a content source can be buffered in a memory device a predetermined time before presentation. An artificial neural network (ANN) in the memory device can identify a region in the buffered portion and analyze the region to determine a classification of content in the region. Within the memory device, the content in the region can be transformed according to a preference specified for the classification. For example, unwanted or objectionable content can be masked, distorted, skipped, replaced, and/or filtered. A modified version of the portion is generated from transforming the content in the region as output for presentation.

Abstract: A method includes receiving, by a processing device, an indication that a host system is to become idle for a first period of time, identifying, by the processing device based on the first period of time, a background operation at a memory sub-system, and causing, by the processing device, execution of the background operation at the memory sub-system during the first period of time.

Abstract: Disclosed are methods, devices, and computer-readable media for operating paired or grouped drone devices. In one embodiment, a method is disclosed comprising capturing a first image by a camera installed on a first drone device; processing the first image using an artificial intelligence (AI) engine embedded in the first drone device, the processing comprising generating a first inference output; transmitting the first inference output to a second drone device; receiving a second inference output from the second drone device, the second inference output associated with a second image captured by the second drone device; and transmitting the first image to a processor based on the first inference output and second interference output.

Abstract: A first set of memory access operations is performed at a memory sub-system based on first operation settings that are configured based on a first operating environment of a host system. A detection is made that the host system is operating in a second operating environment that is different from the first operating environment. A level of impact that each operating requirement of a set of operating requirements of the memory sub-system has on a performance of the memory sub-system in view of the second operating environment. A second set of memory access operations is determined based on a respective priority for each operating requirement of the set of operating requirements. A second set of memory access operations is performed at the memory sub-system based on the second set of memory access operation settings.

Abstract: A system includes a memory device to maintain data for a machine learning operation. The memory device includes solder balls. The system further includes a machine learning processing device to perform the machine learning operation. The system further includes a processing device to select, based on the machine learning operation, a set of solder balls from the plurality of solder balls to transmit the data from the non-volatile memory device to the machine learning processing device.

Abstract: A solid state drive having a drive aggregator and a plurality of component solid state drive, including a first component solid state drive and a second component solid state drive. The drive aggregator has at least one host interface, and a plurality of drive interfaces connected to the plurality of component solid state drives. The drive aggregator is configured to generate, in the second solid state drive, a copy of a dataset that is stored in the first component solid state drive. In response to a failure of the first component solid state drive, the drive aggregator is configured to substitute a function of the first component solid state drive with respect to the dataset with a corresponding function of the second component solid state drive, based on the copy of the dataset generated in the second component solid state drive.

Abstract: A first time period during which the memory sub-system is expected to receive first host data from a host system and a second time period during which the memory sub-system is expected to receive second host data from the host system is determined in view of one or more prior programming operations performed at a memory sub-system. A memory management operation is scheduled to be performed between the first time period and the second time period.

Abstract: Disclosed is a system, and a method of using the system, that includes a memory component and a processing device. The processing device provides, to a host system, a failure notification that includes an indication of memory cell(s) of the memory device storing a data that was corrupted during a memory operation. The processing device then receives a replacement data from the host system. The replacement data is provided in response to the host system identifying a range of logical addresses corresponding to the corrupted data, based on geometric parameters of the memory device and the failure notification.

Abstract: A system having a central station and a plurality of cameras installed various locations. To search for and locate an item of interest, the central station generates and sends an item model to the cameras. When stored in a camera, the item model causes a logic circuit of the camera (e.g., a deep learning accelerator) to use image data, received from an image sensor for storing in a memory device of the camera, as an input to an artificial neural network. The logic circuit performs the matrix computation of the artificial neural network to generate a classification of whether the images are relevant to the item of interest characterized by the item model. If so, the camera transmits the relevant images to the central station for further processing to determine a real time location of the item of interest.

Abstract: A device having a plurality of pins configured to connect circuits within an integrated circuit package to circuits outside of the integrated circuit package. Circuitry in the device is configured to automatically adapt settings of a pin driver to a system in which the device is installed. For example, the driving strength of the pin driver can be automatically reduced to an optimized level that is just above a level that can cause errors in communications. For example, the delay of a signal driving by the pin driver can be set to a midpoint between an upper boundary of delays between failed and successful transmissions and a lower boundary of delays between successful and failed transmissions.

Abstract: A technique to control write operations in a logical partition. For example, a device can receive a user specified write threshold for the logical partition that is hosted on a pool of memory cells shared by a plurality of logical partitions in wear leveling. An accumulated amount of data written into the memory cells according to write requests addressing the logical partition is tracked. In response to the accumulated amount reaches the write threshold, further write requests addressing the logical partition can be blocked, rejected, and/or ignored. For example, the logical partition can be used to buffer data for time shift in playing back content streaming from a server. Write operations for time shift can be limited via the user specified threshold to prevent overuse of the total program erasure budget of the pool of memory cells shared with other logical partitions.

Abstract: A memory system having multiple address tables to translate logical addresses to physical addresses at different granularity levels. For example, a first address table is associated with a first block size of translating logical addresses for accessing system files and application files; and a second address table is associated with a second block size of translating logical addresses for storing and/or retrieving data from an image sensor of a surveillance camera. A user interface can be used to access a configuration option to specify the second block size; and a user may indicate a typical size of an image or video file to be recorded by the surveillance camera to calculate the second block size and thus configured the second address table for a partition to record the image or video files.

Abstract: A device having a plurality of pins configured to connect circuits within an integrated circuit package to circuits outside of the integrated circuit package. A driver enclosed within the package is programmable to generate a spread spectrum signal to represent data being transmitted from a pin of the device. Frequency distribution of the signal spreading over a bandwidth in a frequency domain can be programmed to customize the electromagnetic emission caused by the communication of data through the pin. The frequency spreading can be programmed to reduce energy consumption, electromagnetic interference, and/or errors in receiving the data transmitted via the pin. The settings can be programmed into registers enclosed in the integrated circuit package to control the driver and/or dynamically adjusted using an artificial intelligent engine to optimize a cost function.

Abstract: A device having a plurality of pins configured to connect circuits within an integrated circuit package to circuits outside of the integrated circuit package. A driver, enclosed within the package, is programmable to adjust the strength, delay, and/or slew rate of the signals driven onto a pin of the device to represent a predetermined bit of data. Such aspects of the signals driven by the driver according to the programmed settings can be adjusted to reduce energy consumption, electromagnetic interference, and/or errors in receiving the data transmitted via the pin. The settings can be programmed into registers enclosed in the integrated circuit package to control the driver and/or dynamically adjusted using an artificial intelligent engine to optimize a cost function.

Abstract: A system receives, via a graphical user interface (GUI), a user selection of one or more parameters indicative of a request to segment the memory device into partitions for use by a host system. Responsive to receiving, via the GUI, the user selection of the one or more parameters indicative of the request to segment the memory device into the partitions, the system configures a first partition of the partitions with one or more configuration settings based on the one or more parameters. To configure the first partition, the system determines a memory type from multiple memory types based on the one or more parameters, and configures the first partition of the partitions to operate as the determined memory type.