Patents by Inventor Rajeev K. Nalawadi

Rajeev K. Nalawadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120151020
    Abstract: A method and apparatus for updating the system configuration settings of a computer system Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 14, 2012
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Patent number: 8122112
    Abstract: A method and apparatus for updating the system configuration settings of a computer system. Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: February 21, 2012
    Assignee: Intel Corporation
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Publication number: 20100278193
    Abstract: Various embodiments of the invention relate to apportioning a total memory bandwidth available for a time period amongst a plurality of bandwidth requests according to a power managed profile. In addition, isochronous data transmission may be appended together and transmitted according to a data transmission policy, wherein the policy may include transmitting the appended isochronous data during an opportunistic data transmission, or during a time identified for transmitting a combined isochronous data transmission, but prior to a time delay compliance limit for isochronous requirements.
    Type: Application
    Filed: June 14, 2010
    Publication date: November 4, 2010
    Inventors: Rajeev K. Nalawadi, Mark P. VanDeusen
  • Patent number: 7808895
    Abstract: Various embodiments of the invention relate to apportioning a total memory bandwidth available for a time period amongst a plurality of bandwidth requests according to a power managed profile. In addition, isochronous data transmission may be appended together and transmitted according to a data transmission policy, wherein the policy may include transmitting the appended isochronous data during an opportunistic data transmission, or during a time identified for transmitting a combined isochronous data transmission, but prior to a time delay compliance limit for isochronous requirements.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: October 5, 2010
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Mark P. VanDeusen
  • Publication number: 20100223454
    Abstract: A method and apparatus for updating the system configuration settings of a computer system. Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Application
    Filed: May 13, 2010
    Publication date: September 2, 2010
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Patent number: 7769836
    Abstract: A method and apparatus for updating the system configuration settings of a computer system. Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Publication number: 20100169883
    Abstract: Embodiments of apparatuses, methods, and systems for providing multiple virtual device controllers by redirecting an interrupt from a physical device controller are disclosed. In one embodiment, an apparatus includes a processor, a physical device controller, and virtualization logic. The virtualization logic is to receive a first interrupt from the physical device controller, and in response, send a second interrupt to the processor from one of a plurality of virtual device controllers.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Zohar Bogin, Suryaprasad Kareenahaili, Rajeev K. Nalawadi, Michael Tabet, Darren Abramson
  • Publication number: 20100169885
    Abstract: Embodiments of apparatuses, methods, and systems for paging instructions for a virtualization engine to local storage are disclosed. In one embodiment, an apparatus includes a processor, a physical device controller, a virtualization engine, system memory, and local storage. The physical device controller is to be shared by a plurality of virtual machines created by a virtual machine monitor installed on a processor. The virtualization engine is to represent the physical device controller as a plurality of virtual device controllers available to be allocated to the plurality of virtual machines. The local storage is separate from the physical memory to store instructions transferred from the system memory for execution by the virtualization engine.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Zohar Bogin, Suryaprasad Kareenahalli, Rajeev K. Nalawadi, Christopher D. Kral
  • Publication number: 20100169884
    Abstract: Embodiments of apparatuses, methods, and systems for injecting transactions to support the virtualization of a physical device controller are disclosed. In one embodiment, an apparatus includes a processor, system memory, a physical device controller, and a virtualization agent. The physical device controller is to be shared by a plurality of virtual machines created by a virtual machine monitor installed on a processor. The virtualization agent is coupled to the system memory through a first interface and coupled to the physical device controller through a second interface, to represent the physical device controller as a plurality of virtual device controllers available to be allocated to the plurality of virtual machines, and to inject transactions onto the first interface and the second interface on behalf of the plurality of virtual device controllers.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Zohar Bogin, Suryaprasad Kareenahalli, Rajeev K. Nalawadi, Eric Ferrara
  • Patent number: 7529923
    Abstract: Provided are a method, system and program for effecting an operating system mode change from one mode to another. In one embodiment, the operating system in one mode is placed in a sleep state in which volatile memory remains active. In booting an operating system from the sleep state, a flag may be detected indicating an operating system mode transfer request. In response, contents of a selected range of volatile memory allocated to the first operating system mode may be swapped with the contents of a selected range of a reserve portion of volatile memory allocated to the second operating system mode. Booting of an operating system in the second mode may be completed using the swapped contents of the volatile memory. Additional embodiments are described and claimed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 5, 2009
    Assignee: Intel Corporation
    Inventors: Brent D. Chartrand, Rajeev K. Nalawadi, Alberto Martinez
  • Patent number: 7437503
    Abstract: Embodiments of the present invention provide for implementation of data transfers in an efficient manner. The 48-bit LBA mechanism requires two sets of I/O writes to IDE registers on primary channel or secondary channel. The two sets of I/O writes to the primary or secondary channel registers are performed by setting a status register to a first or second state appropriately depending on the data. Embodiments of the present invention provide a single set of writes to I/O registers when the size of the data transfer is equal to or below a threshold value.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: October 14, 2008
    Assignee: Intel Corporation
    Inventors: Rajeev K Nalawadi, Steve P Mooney
  • Publication number: 20080162675
    Abstract: A method and apparatus for updating the system configuration settings of a computer system. Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Application
    Filed: February 27, 2008
    Publication date: July 3, 2008
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Patent number: 7373498
    Abstract: A method and apparatus for updating the system configuration settings of a computer system Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventors: Frederick H. Bolay, Rajeev K. Nalawadi
  • Patent number: 7325146
    Abstract: Embodiments of the present invention provide for generation of SMI from ACPI ASL control method code to execute complex tasks including, but not limited to, transferring or searching through large amounts of data dynamically. Instead of executing certain tasks using limited ASL functionality, an SMI is generated in an ASL code execution path to enable usage of a CPU instruction set accessible to the SMM handler. In particular, an ACPI operation region is defined for an I/O address location capable of triggering an SMI. An ACPI control method accesses the SMI generation I/O address location to generate an SMI during ASL code execution when a predefined complex task is encountered, thus enabling the SMI handler code to advantageously execute the complex task.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Fred H. Bolay
  • Patent number: 7281146
    Abstract: A system and method to determine a presence of devices coupled to one a more peripheral buses in a system, and dynamically reducing power consumption of a subset of the devices that are present, based on correlating application/device association and a predetermined power source budget. In one embodiment, the reducing of the power consumption is performed dynamically by having an agent reduce the power limit in a device register(s) corresponding to the subset of devices. Furthermore, in one embodiment, the power resource budget is based at least in part on a user-selected power/performance level.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 9, 2007
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Mark P. Van Deusen
  • Patent number: 7243041
    Abstract: A device to control memory bandwidth including a processing unit and a memory connected to the processing unit, the memory having a memory controller driver to issue at least one command based on a memory bandwidth requirement of another driver process. A memory controller to direct data to and from the memory. An active cooling device is connected to the processing unit and a thermal sensor.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: July 10, 2007
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Murali Ramadoss
  • Patent number: 7178014
    Abstract: An ACPI (Non-Volatile Sleeping) NVS memory region is allocated and defined so that a system BIOS can allocate a placeholder for the different parameters that are passed from the ACPI ASL code to the system management mode (SMM) handler for execution of real mode calls. The different parameters will be updated by runtime ACPI ASL code depending on what needs to be passed to the SMM handler. The SMM handler invokes appropriate calls based on retrieving of different parameters in the ACPI NVS memory region that have been passed from the ACPI ASL code.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: February 13, 2007
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Victor M. Munoz
  • Patent number: 7143234
    Abstract: Methods, apparatus and machine readable medium are described in which BIOS initialization code divides one or more storage devices into two or more portions. Further, a BIOS device handler may use the portions of the divided storage devices to implement a storage array that provides attributes of one or more RAID levels.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 28, 2006
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Dong Thai
  • Patent number: 7137016
    Abstract: Methods and apparatuses for dynamically loading and unloading power management code at runtime in a secure environment are described herein. In one embodiment, exemplary method includes loading authenticated/trusted power management code into a memory of a secure environment of an operating system (OS) and executing the power management code within the secure environment of the OS to handle power management tasks. Other methods and apparatuses are also described.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: November 14, 2006
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Faraz A. Siddigi
  • Patent number: 7093118
    Abstract: System and method for external bus device support. The system comprises a processor, a memory, one or more external bus controllers and a basic input-output system (BIOS). The BIOS contains an external bus support component to cause a periodic interrupt to be generated and to provide support for external bus enabled devices responsive to the periodic interrupt. The method comprises obtaining a portion of the memory to be used to maintain a plurality of external bus device data; causing an interrupt to be periodically generated; and handling input produced by external bus enabled devices using the portion of the memory. The interrupt may be a system management interrupt (SMI) of the 32-bit Intel Architecture (IA-32). The external bus controller may be a Universal Serial Bus (USB) host controller, the external bus devices may be USB devices, and the external bus support component may be a USB support component.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: August 15, 2006
    Assignee: Intel Corporation
    Inventors: Rajeev K. Nalawadi, Frederick H. Bolay