Patents by Inventor Rajesh Poornachandran

Rajesh Poornachandran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230198959
    Abstract: Embodiments described herein are generally directed to a transparent and adaptable mechanism for performing secure application communications through sidecars. In an example, a set of security features is discovered by a first sidecar of a first microservice of multiple microservices of an application. The set of security features are associated with a device of multiple devices of a set of one or more host systems on which the first microservice is running. Information regarding the set of discovered security features is made available to the other microservices by the first sidecar by sharing the information with a discovery service accessible to all of the microservices. A configuration of a communication channel through which a message is to be transmitted from a second microservice to the first microservice is determined by a second sidecar of the second microservice by issuing a request to the discovery service regarding the first microservice.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Cesar Martinez-Spessot, Marcos Carranza, Lakshmi Talluru, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Publication number: 20230198875
    Abstract: An apparatus to facilitate at-scale telemetry using interactive matrix for deterministic microservices performance is disclosed. The apparatus includes one or more processors to: receive user input comprising an objective or task corresponding to scheduling a microservice for a service, wherein the objective or task may include QoS, SLO, ML feedback; identify interaction matrix components in an interaction matrix that match the objective or tasks for the microservice; identify knowledgebase components in knowledgebase that match the objective or tasks for the microservice; and determine a scheduling operation for the microservice, the scheduling operation to deploy the microservice in a configuration that is in accordance with the objective or task, wherein the configuration comprises a set of hardware devices and microservice interaction points determined based on the interaction matrix components and the knowledgebase components.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20230195485
    Abstract: Embodiments described herein are generally directed to assigning virtual machine (VM) workloads to groupings/partitions of accelerator resources. In an example, a processing resource of a host system maintains: (i) a resource data structure containing resource utilization information for each of one or more accelerators associated with the host system; and (ii) a group data structure containing information regarding each group of multiple groups of one or more virtual functions (VFs) of the one or more accelerators that has been assigned for use by a respective VM of multiple VMs running on a virtual machine monitor (VMM) of the processing resource. A request to deploy a workload associated with a first VM is received. Responsive to the request, the workload is assigned to a VF of a group of the multiple groups determined to have resource capacity available to satisfy expected resource utilization of the workload.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Devamekalai Nagasundaram, San Yen Wong, Haarika Madaka, Wei Seng Yeap, Marcos Carranza, Cesar Martinez Spessot, Francesc Guim Bernat, Rajesh Poornachandran
  • Publication number: 20230195547
    Abstract: Embodiments described herein are generally directed to the use of sidecars to perform dynamic API contract generation and conversion. In an example, a first call by a first microservice to a first API of a second microservice is intercepted by a first sidecar of the first microservice. The first API is of a first API type of multiple API types and is specified by a first contract. An API type of the multiple API types is selected by the first sidecar. Responsive to determining the selected API type differs from the first API type, based on the first contract, a second contract is generated by the first sidecar specifying a second API of the selected API type; and a second sidecar of the second microservice is caused to generate the second API and internally connect the second API to the first API based on the second contract.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Marcos Carranza, Cesar Martinez-Spessot, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Publication number: 20230195597
    Abstract: An apparatus to facilitate matchmaking-based enhanced debugging for microservices architectures is disclosed. The apparatus includes one or more processors to: detect, by an anomaly detector in a sidecar of a microservice hosted by a container, an anomaly in telemetry data generated by the microservice, the microservice hosted in a container executed by the processor and part of a service of an application; enable, by an enhanced debug and trace component of the sidecar, a debug mode in the microservice, the debug mode based on a type of the anomaly; collect, by the enhanced debug and trace component, a target set of data points generated by the microservice; and process, by the enhanced debug and trace component, the target set of data points with a matchmaking process to generate a timestamp and a tag for a context for each data point of the target set of data points.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Marcos Carranza, Cesar Martinez-Spessot, Rajesh Poornachandran, Kshitij Arun Doshi
  • Publication number: 20230195601
    Abstract: An apparatus to facilitate synthetic data generation for enhanced microservice debugging is disclosed. The apparatus includes one or more processors to: load a filter for a synthetic data generator for a service deployed in a datacenter system, the filter configured for the service based on service policies; prioritize synthetic parameters of the filter based on service parameters used to model microservices deployed for the service; generate a synthetic dataset for ingestion using the prioritized synthetic parameters in the filter of the synthetic data generator, the synthetic dataset generated by applying the synthetic parameters of the filter to an original infield dataset of the service; demultiplex the synthetic dataset in response to a synthetic activation profile generated using the synthetic dataset matching one or more monitored previous activation profiles of the service; and reverse map the demultiplexed synthetic dataset to match to original data in the original infield dataset.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh Poornachandran, Marcos Carranza
  • Publication number: 20230199077
    Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20230198863
    Abstract: An apparatus to facilitate telemetry targeted query injection for enhanced debugging in microservices architectures is disclosed. The apparatus includes one or more processors to: identify contextual trace of a previous query recorded in collected data of a service, where microservices of the service responded to the previous query; access an interdependency flow graph representing an architecture and interaction of microservices deployed for a service; retrieve, based on the interdependency flow graph, telemetry data of the microservices corresponding to the contextual trace; identify, based on the telemetry data, an activation profile corresponding to the previous query, the activation profile detailing a response of the microservices to the previous query; compare the activation profile to a correlation profile for the previous query to detect whether an anomaly occurred in the service in response to the previous query; and recommend a modified query based on detection of the anomaly.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh Poornachandran, Marcos Carranza
  • Publication number: 20230185609
    Abstract: An apparatus is provided comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions to receive a request to execute a task on a computing system, receive a requirement of the task for usage of a resource of the computing system, and schedule execution of the task by reserving at least part of the resource for the execution of the task based on the requirement.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 15, 2023
    Inventor: Rajesh POORNACHANDRAN
  • Patent number: 11656853
    Abstract: Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 23, 2023
    Assignee: INTEL CORPORATION
    Inventors: Mingqiu Sun, Rajesh Poornachandran, Vincent J. Zimmer, Ned M. Smith, Gopinatth Selvaraje
  • Patent number: 11637687
    Abstract: Methods, apparatus, systems and articles of manufacture to determine provenance for data supply chains are disclosed. Example instructions cause a machine to at least, in response to data being generated, generate a local data object and object metadata corresponding to the data; hash the local data object; generate a hash of a label of the local data object; generate a hierarchical data structure for the data including the hash of the local data object and the hash of the label of the local data object; generate a data supply chain object including the hierarchical data structure; and transmit the data and the data supply chain object to a device that requested access to the data.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 25, 2023
    Assignee: Intel Corporation
    Inventors: Ned Smith, Francesc Guim Bernat, Sanjay Bakshi, Paul O'Neill, Ben McCahill, Brian A. Keating, Adrian Hoban, Kapil Sood, Mona Vij, Nilesh Jain, Rajesh Poornachandran, Trevor Cooper, Kshitij A. Doshi, Marcin Spoczynski
  • Publication number: 20230118160
    Abstract: Examples of the present disclosure relate to an apparatus, device, method, and computer program for monitoring a processing device from a trusted domain. The apparatus comprises interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions to receive a request for monitoring the processing device from the trusted domain; authenticate the request; obtain information on a failure report related to a component of the processing device, with a possible failure having occurred at runtime of the processing device; and provide the information on the failure report in the trusted domain.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 20, 2023
    Inventor: Rajesh POORNACHANDRAN
  • Publication number: 20230110131
    Abstract: The Internet can be configured to provide communications to a large number of Internet-of-Things (IoT) devices. Devices can be designed to address the need for network layers, from central servers, through gateways, down to edge devices, to grow unhindered, to discover and make accessible connected resources, and to support the ability to hide and compartmentalize connected resources. Network protocols can be part of the fabric supporting human accessible services that operate regardless of location, time, or space. Innovations can include service delivery and associated infrastructure, such as hardware and software. Services may be provided in accordance with specified Quality of Service (QoS) terms. The use of IoT devices and networks can be included in a heterogeneous network of connectivity including wired and wireless technologies.
    Type: Application
    Filed: August 29, 2022
    Publication date: April 13, 2023
    Inventors: Ned M. Smith, Keith Nolan, Mark Kelly, Gregory Burns, Michael Nolan, John Brady, Cliodhna Ni Scanaill, Niall Cahill, Thiago Macieira, Zheng Zhang, Glen J. Anderson, Igor Muttik, Davide Carboni, Eugene Ryan, Richard Davies, Toby M. Kohlenberg, Maarten Koning, Jakub Wenus, Rajesh Poornachandran, William C. Deleeuw, Ravikiran Chukka
  • Publication number: 20230102279
    Abstract: Systems, methods, and apparatuses relating sparsity based FMA. In some examples, an instance of a single FMA instruction has one or more fields for an opcode, one or more fields to identify a source/destination matrix operand, one or more fields to identify a first plurality of source matrix operands, one or more fields to identify a second plurality of matrix operands, wherein the opcode is to indicate that execution circuitry is to select a proper subset of data elements from the first plurality of source matrix operands based on sparsity controls from a first matrix operand of the second plurality of matrix operands and perform a FMA.
    Type: Application
    Filed: September 25, 2021
    Publication date: March 30, 2023
    Inventors: Menachem ADELMAN, Robert VALENTINE, Dan BAUM, Amit GRADSTEIN, Simon RUBANOVICH, Regev SHEMY, Zeev SPERBER, Alexander HEINECKE, Christopher HUGHES, Evangelos GEORGANAS, Mark CHARNEY, Arik NARKIS, Rinat RAPPOPORT, Barukh ZIV, Yaroslav POLLAK, Nilesh JAIN, Yash AKHAURI, Brinda GANESH, Rajesh POORNACHANDRAN, Guy BOUDOUKH
  • Publication number: 20230093493
    Abstract: Examples of the present disclosure relate to an apparatus, device, method, and computer program for configuring a processing device, and to a computer system comprising such an apparatus or device. The apparatus or device is configured to obtain information on a failure related to a component of the processing device, with the failure having occurred at runtime of the processing device, determine information on a microcode update to be applied to the processing device to remedy the failure related to the component, and configure the processing device to apply the microcode update.
    Type: Application
    Filed: September 30, 2022
    Publication date: March 23, 2023
    Inventors: Rajesh POORNACHANDRAN, Kshitij Arun DOSHI, Vinayak HONKOTE, Vincent ZIMMER, Subrata BANIK
  • Publication number: 20230037609
    Abstract: Examples described herein relate to an interface and a network interface device coupled to the interface and comprising circuitry to: control power utilization by a first set of one or more devices based on power available to a system that includes the first set of one or more devices, wherein the system is communicatively coupled to the network interface and control cooling applied to the first set of one or more devices.
    Type: Application
    Filed: September 28, 2022
    Publication date: February 9, 2023
    Inventors: Paniraj GURURAJA, Navneeth JAYARAJ, Mahammad Yaseen Isasaheb MULLA, Nitesh GUPTA, Hemanth MADDHULA, Laxminarayan KAMATH, Jyotsna BIJAPUR, Delraj Gambhira DAMBEKANA, Vikrant THIGLE, Amruta MISRA, Anand HARIDASS, Rajesh POORNACHANDRAN, Krishnakumar VARADARAJAN, Sudipto PATRA, Nikhil RANE, Teik Wah LIM
  • Patent number: 11570264
    Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: January 31, 2023
    Assignee: INTEL CORPORATION
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Patent number: 11561868
    Abstract: Embodiments described herein are generally directed to intelligent management of microservices failover. In an example, responsive to an uncorrectable hardware error associated with a processing resource of a platform on which a task of a service is being performed by a primary microservice, a failover trigger is received by a failover service. A secondary microservice is identified by the failover service that is operating in lockstep mode with the primary microservice. The secondary microservice is caused by the failover service to takeover performance of the task in non-lockstep mode based on failover metadata persisted by the primary microservice. The primary microservice is caused by the failover service to be taken offline.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: January 24, 2023
    Assignee: Intel Corporation
    Inventors: Rajesh Poornachandran, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20230018149
    Abstract: Systems and methods for code generation for a plurality of architectures. At a host architecture, a JIT compile operation is performed for a received JavaScript or Web Assembly file. The JIT compiler references a host library that has been updated to include at least one new JIT instruction. Output from the JIT compile operation is compiled machine code for the host architecture that has new opcodes (OPX) added, responsive to the new JIT instruction. The JIT compiler executes the opcodes (OPX) in XuCode mode, meaning that the host architecture switches into a hardware protected private ISA (Instruction Set Architecture) called XuCode to implement the new JIT opcode instruction in XuCode.
    Type: Application
    Filed: September 22, 2022
    Publication date: January 19, 2023
    Applicant: Intel Corporation
    Inventors: Mingqiu Sun, Rajesh Poornachandran, Vincent Zimmer, Gopinatth Selvaraje
  • Publication number: 20230013452
    Abstract: System and techniques for an environmental control loop are described herein. A device for an environmental control loop can include a memory including instructions and processing circuitry that when in operation, can be configured by the instructions to receive environmental sensor data from a first component in a set of heterogeneous components installed in an environment with a controller. The environmental sensor data can indicate a service level value sensed by the first component. The controller can also measure a violation of a service level objective based on comparing the environmental sensor data to a threshold. The controller can also transmit an adjustment to an operating parameter of a second component of the set of heterogeneous components. The adjustment can be operative to attenuate the violation of the service level objective when implemented by the second component.
    Type: Application
    Filed: September 27, 2022
    Publication date: January 19, 2023
    Inventors: S M Iftekharul Alam, Marcos E. Carranza, Francesc Guim Bernat, Mateo Guzman, Satish Chandra Jha, Cesar Martinez-Spessot, Arvind Merwaday, Rajesh Poornachandran, Vesh Raj Sharma Banjade, Kathiravetpillai Sivanesan, Ned M. Smith, Liuyang Lily Yang, Mario Jose Divan Koller