Abstract: Methods and apparatus for inspecting features on a substrate including exposing at least a portion of the substrate to a first electron beam landing energy to obtain a first image; exposing the at least a portion of the substrate to a second electron beam landing energy to obtain a second image, wherein the second electron beam landing energy is different from the first electron beam landing energy; realigning the first image and the second image to a feature on the substrate; and determining from at least one measurement from the first image associated with the feature and at least one measurement from the second image associated with the feature if the feature is leaning or twisting.

Abstract: Methods of etching a metal layer and a metal-containing barrier layer to a predetermined depth are described. In some embodiments, the metal layer and metal-containing barrier layer are formed on a substrate with a first dielectric and a second dielectric thereon. The metal layer and the metal-containing barrier layer formed within a feature in the first dielectric and the second dielectric. In some embodiments, the metal layer and metal-containing barrier layer can be sequentially etched from a feature formed in a dielectric material. In some embodiments, the sidewalls of the feature formed in a dielectric material are passivated to change the adhesion properties of the dielectric material.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure utilize a cap layer to protect an insulating layer in order to minimize bowing of the side walls during metal recess in a fully self-aligned via. The cap layer can be selectively removed, thus increasing the aspect ratio, by exposing the substrate to a hot phosphoric acid solution.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. A first metallization layer comprises a set of first conductive lines extending along a first direction on a first insulating layer on a substrate, the set of first conductive lines recessed below a top portion of the first insulating layer. A capping layer is on the first insulating layer, and a second insulating layer is on the capping layer. A second metallization layer comprises a set of second conductive lines on the second insulating layer and on a third insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. At least one via is between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines. The tapering angle of the via opening may be in a range of from about 60° to about 120°.

Abstract: Methods to remove metal oxides from substrate surfaces are described. Some embodiments of the disclosure utilize an aqueous alkaline solution to remove metal oxides from substrate surfaces using a wet method. Some embodiments of the disclosure are performed at atmospheric pressure and lower temperatures. Methods of forming self-aligned vias are also described.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a bridging via between a first metallization and a third metallization layer, the bridging via not contacting a second metallization layers. Methods of providing self-aligned bridging vias are also described.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure utilize a cap layer to protect an insulating layer in order to minimize bowing of the side walls during metal recess in a fully self-aligned via. The cap layer can be selectively removed, thus increasing the aspect ratio, by exposing the substrate to a hot phosphoric acid solution.

Abstract: Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments relate to the formation of self-aligned DRAM capacitors. More particularly, certain embodiments relate to the formation of self-aligned DRAM capacitors utilizing the formation of self-aligned growth pillars. The pillars lead to greater capacitor heights, increase critical dimension uniformity, and self-aligned bottom and top contacts.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure utilize a cap layer to protect an insulating layer in order to minimize bowing of the side walls during metal recess in a fully self-aligned via. The cap layer can be selectively removed, thus increasing the aspect ratio, by exposing the substrate to a hot phosphoric acid solution.

Abstract: Methods and apparatus for inspecting features on a substrate including exposing at least a portion of the substrate to a first electron beam landing energy to obtain a first image; exposing the at least a portion of the substrate to a second electron beam landing energy to obtain a second image, wherein the second electron beam landing energy is different from the first electron beam landing energy; realigning the first image and the second image to a feature on the substrate; and determining from at least one measurement from the first image associated with the feature and at least one measurement from the second image associated with the feature if the feature is leaning or twisting.

Abstract: Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.

Abstract: Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.

Abstract: Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing the formation of self-aligned growth pillars. The pillars lead to taller gate heights and increased margins against shorting defects.

Abstract: Processing methods to etch metal oxide films with less etch residue are described. The methods comprise etching a metal oxide film with a metal halide etchant, and exposing the etch residue to a reductant to remove the etch residue. Some embodiments relate to etching tungsten oxide films. Some embodiments utilize tungsten halides to etch metal oxide films. Some embodiments utilize hydrogen gas as a reductant to remove etch residues.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a non-perpendicular angle to the plane of the surface to selectively deposit the material on a top portion of one or more features on the substrate and form an overhang extending beyond a first sidewall of the one or more features; and etching a first layer of the substrate beneath the one or more features selective to the deposited material.

Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a rotatable diffracting element prior to imaging it by a sensor and converting it into an electrical signal. The resulting image changes depending on the rotational positioning of the grating. The diffracted image is inspected to identify, localize and classify faulty devices within the DUT.

Abstract: Processing methods to etch metal oxide films with less etch residue are described. The methods comprise etching a metal oxide film with a metal halide etchant, and exposing the etch residue to a reductant to remove the etch residue. Some embodiments relate to etching tungsten oxide films. Some embodiments utilize tungsten halides to etch metal oxide films. Some embodiments utilize hydrogen gas as a reductant to remove etch residues.

Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.