Abstract: A system and method are provided for detecting a stable region in a data signal to facilitate the alignment between a data signal and a corresponding clock signal. The system includes a processor coupled to a local interface and a memory coupled to the local interface. The system also includes a boundary detection circuit configured to perform a simultaneous sampling of a reference signal and a delayed reference signal to ascertain a degree of stability of a position in the reference signal. The reference signal is the signal received from the target system and the delayed reference signal is a delayed copy of the reference signal. The system also includes boundary detection logic stored on the memory and executed by the processor to control the operation of the boundary detection circuit. The boundary detection logic includes logic to detect a boundary of the stable region of the reference.

Abstract: Disclosed is a system and method to compare logical values. The system employs a field programmable gate array (FPGA) configured for comparing logical values. The FPGA includes a number of inputs to receive an N-bit sampled value from a target system, where N defines the number of bits in the N-bit sampled value. The FPGA also includes a number of lookup tables configured to receive an M-bit portion of the N-bit sampled value. These lookup tables generate a lookup table output in response to the M-bit portion. Finally, an AND operation is performed on the outputs of the lookup tables that generates an output indicating whether the particular N-bit logical value matches a particular desired value. Note that a single AND gate may be used or a number of AND gates may be used in place of the single AND gate. The tables within the lookup tables are generated based upon a desired logical value and a comparison mask value.

Abstract: Multi-channel measurement equipment enters or performs a special mode of operation in response to an arbitrarily chosen probe being momentarily touched to a special terminal. A signal identifiable by its uncommon properties is present at the special terminal. The uncommon signal is generated by a suitable circuit, which may be similar to a pseudo random sequence generator. Each channel is equipped with a recognition circuit that recognizes the presence of the uncommon signal. The recognition circuits each receive a copy of the uncommon ID signal, and the task of recognition is performed by pattern matching over time. To enter or perform the special mode the operator touches the probe to the special terminal. After a suitable but brief period of time the recognition circuit for that probe produces an output that indicates recognition. The measurement equipment responds by entering or performing the special mode of operation.

Abstract: Multi-channel measurement equipment identifies probe-to-channel correspondence by providing an identification (ID) terminal that can be touched by a probe whose channel correspondence is sought. A ID signal identifiable by its uncommon properties is present at the ID terminal. The uncommon ID signal is generated by a suitable circuit, which may be similar to pseudo random sequence generator. Each channel is equipped with a recognition circuit that recognizes the presence of the uncommon ID signal. The recognition circuits each receive a copy of the uncommon ID signal, and the task of recognition is performed by pattern matching over time. To discover a probe's channel identity the operator touches the probe to the ID terminal. After a suitable but brief period of time the recognition circuit for that probe produces an output that indicates recognition. The measurement equipment may display a message on a screen to the effect that the system has noticed that the probe for channel "X" is on the ID terminal.

Abstract: An n-bit input value is partitioned into groups of most significant and least significant bits. Each group respectively describes integers J and K that comprise the input value; J and K need not each have the same radix. J and K are applied as addresses to respective Random Access Memories (RAM's). Each RAM is previously pre-loaded with information specific to the range or ranges to be detected, and each outputs respective J- and K-type information as a function of the applied J and K. The J- and K-type information is merged together and applied as an address to a third RAM whose output indicates which range, if any, the input value lies within. The output of the third RAM can be in either a bit-per-range format or a range-per-code format. The former is faster and accommodates arbitrary ranges, while the latter allows recognition of significantly more disjoint ranges at the expense of the extra time required for subsequent interpretation of the range code.

Abstract: An n-bit input value is partitioned into groups of most significant and least significant bits. Each group respectively describes integers J and K that comprise the input value; J and K need not each have the same radix. J and K are applied as addresses to respective Random Access Memories (RAM's). Each RAM is previously pre-loaded with information specific to the range or ranges to be detected, and each outputs respective J- and K-type information as a function of the applied J and K. The J- and K-type information is merged together and applied as an address to a third RAM whose output indicates which range, if any, the input value lies within. The output of the third RAM can be in either a bit-per-range format or a range-per-code format. The former is faster and accommodates arbitrary ranges, while the latter allows recognition of significantly more disjoint ranges at the expense of the extra time required for subsequent interpretation of the range code.

Abstract: A variable resolution counter is provided in which the resolution of the count decreases as the counted value increases. A set of scale control bits from the most significant bits of the counter are used to control selection of one of several prescaled signals from a prescaler. Resetting of the count value may be made conditional on the value of the count, and a flag may be provided to effectively redistribute the capacity of the counter between high and low resolution modes. A gray code of particular interest is also disclosed.