Patents by Inventor Richard J. Dischler

Richard J. Dischler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10249925
    Abstract: An apparatus comprises a plurality of waveguides, wherein the waveguides include a dielectric material; an outer shell; and a supporting feature within the outer shell, wherein the waveguides are arranged separate from each other within the outer shell by the supporting feature.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Sasha N. Oster, Telesphor Kamgaing, Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Aleksandar Aleksov, Brandon M. Rawlings, Richard J. Dischler
  • Publication number: 20190094925
    Abstract: Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a die disposed on a substrate; a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is disposed on a backside of the die disposed on a package substrate. A lid comprising an outer surface is disposed on the first surface of the cooling solution, wherein the lid includes a plurality of fins disposed on an inner surface of the lid. A solder is disposed between the outer surface of the lid and the first surface of the cooling solution.
    Type: Application
    Filed: November 21, 2018
    Publication date: March 28, 2019
    Applicant: Intel Corporation
    Inventors: Devdatta P. Kulkarni, Richard J. Dischler, Je-Young Chang
  • Patent number: 10228735
    Abstract: Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a die disposed on a substrate; a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is disposed on a backside of the die disposed on a package substrate. A lid comprising an outer surface is disposed on the first surface of the cooling solution, wherein the lid includes a plurality of fins disposed on an inner surface of the lid. A solder is disposed between the outer surface of the lid and the first surface of the cooling solution.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: March 12, 2019
    Assignee: Intel Corporation
    Inventors: Devdatta P. Kulkarni, Richard J. Dischler, Je-Young Chang
  • Publication number: 20190042534
    Abstract: Embodiments herein may present a multi-tile processor including a plurality of processor tiles, and a plurality of interconnects selectively coupling the plurality of processor tiles to each other. A first processor tile may include a memory to store a bulletin board to hold a message, an execution unit, and an encapsulated software module. The encapsulated software module may select a second processor tile coupled with the first processor tile by an interconnect to be a part of a signal pathway. The second processor tile may be selected based on a selection criterion of the signal pathway and the message held in the bulletin board. The encapsulated software module may post and read a message at the bulletin board stored in the memory, or read a message from a bulletin board stored in a memory of the second processor tile. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: May 15, 2018
    Publication date: February 7, 2019
    Inventors: William J. Butera, Simon C. Steely, JR., Richard J. Dischler
  • Publication number: 20190004573
    Abstract: Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a die disposed on a substrate; a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is disposed on a backside of the die disposed on a package substrate. A lid comprising an outer surface is disposed on the first surface of the cooling solution, wherein the lid includes a plurality of fins disposed on an inner surface of the lid. A solder is disposed between the outer surface of the lid and the first surface of the cooling solution.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Applicant: Intel Corporation
    Inventors: Devdatta P. Kulkarni, Richard J. Dischler, Je-Young Chang
  • Publication number: 20190007224
    Abstract: Technologies for densely packaging network components for large scale indirect topologies include group of switches. The group of switches includes a stack of node switches that includes a first set of ports and a stack of global switches that includes a second set of ports. The stack of node switches are oriented orthogonally to the stack of global switches. Additionally, the first set of ports are oriented towards the second set of ports and the node switches are connected to the global switches through the first and second sets of ports. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventors: Mario Flajslik, Eric R. Borch, Michael A. Parker, Richard J. Dischler
  • Publication number: 20180316375
    Abstract: Wireless interconnects are shown on flexible cables for communication between computing platforms. One example has an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, a cable on the package substrate coupled to the integrated circuit chip at one end, a radio chip on the cable coupled to the cable at the other end, the radio chip to modulate data over a carrier and to transmit the modulated data, and a waveguide transition coupled to a dielectric waveguide to receive the transmitted modulated data from the radio and to couple it into the waveguide, the waveguide to carry the modulated data to an external component.
    Type: Application
    Filed: December 8, 2015
    Publication date: November 1, 2018
    Inventors: Telesphor KAMGAING, Richard J. DISCHLER
  • Publication number: 20180113838
    Abstract: Embodiments relate to a computational device including multiple processor tiles on a die that may have multiple switchable topologies. A topology of the computational device may include one or more virtual circuits. A virtual circuit may include multiple processor tiles. A processor tile of a virtual circuit of a topology may include a configuration vector to control a connection between the processor tile and a neighboring processor tile. A first topology of the computation device may correspond to a first phase of a computation of a program, and a second topology of the computation device may correspond to a second phase of the computation of the program. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 29, 2017
    Publication date: April 26, 2018
    Inventors: William J. Butera, Simon C. Steely, JR., Richard J. Dischler
  • Publication number: 20180097268
    Abstract: A method of making a waveguide ribbon that includes a plurality of waveguides comprises joining a first sheet of dielectric material to a first conductive sheet of conductive material, patterning the first sheet of dielectric material to form a plurality of dielectric waveguide cores on the first conductive sheet, and coating the dielectric waveguide cores with substantially the same conductive material as the conductive sheet to form the plurality of waveguides.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Sasha Oster, Aleksandar Aleksov, Georgios C. Dogiamis, Telesphor Teles Kamgaing, Adel A. Elsherbini, Shawna M. Liff, Johanna M. Swan, Brandon M. Rawlings, Richard J. Dischler
  • Publication number: 20180097269
    Abstract: An apparatus comprises a plurality of waveguides, wherein the waveguides include a dielectric material; an outer shell; and a supporting feature within the outer shell, wherein the waveguides are arranged separate from each other within the outer shell by the supporting feature.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Georgios C. Dogiamis, Sasha Oster, Telesphor Kamgaing, Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Aleksandar Aleksov, Brandon M. Rawlings, Richard J. Dischler
  • Patent number: 6311287
    Abstract: A computer system including a microprocessor and a circuit to provide a clock signal for the microprocessor is described. The circuit is responsive to a control signal for selecting a minimum clock signal frequency value and a maximum clock signal frequency value, with the maximum clock signal frequency value being adjusted in accordance with operating conditions of the central processor. Also the system includes a circuit which varies a magnitude of a supply voltage fed to the microprocessor in accordance with the temperature of the microprocessor and the operating frequency of the microprocessor. This arrangement provides an advantage to save power in computers. It is particularly advantageous for portable computers such as notebook computers to conserve battery charge, minimize heat dissipation in the microprocessor, and to minimize the size and weight of the battery used in the notebook for a given operating duration requirement.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: October 30, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Richard J. Dischler, Jim Klumpp, Reinhard Schumann