Abstract: A method for controlling the autodoping during epitaxial silicon deposition. First, the substrate (10) is cleaned to remove any native oxide. After being cleaned, the substrate (10) is transferred to the deposition chamber in an inert or vacuum atmosphere to inhibit the growth of a native oxide on the surface of the wafers. A lower temperature (i.e., 500-850.degree. C.) capping layer (14) is deposited to prevent autodoping. Then, the temperature is increased to the desired deposition temperature and the remainder of the epitaxial layer (18) is deposited.

Abstract: A dynamic random access memory cell (20) with increased capacitance and a method of fabricating the cell, including forming a corrugated post capacitor (21) is provided. The method includes depositing a first film (80) having a first etched selectivity and depositing on the first film a second film (82) having a second etched selectivity. These steps of depositing a first film and a second film are repeated at least once to form a plurality of first film layers (80) alternated with a plurality of second film layers (82). A void (58) is etched in the plurality of first and second film layers. The plurality of first and second layers are selectively etched to form a plurality of undercut areas. Silicon is then selectively deposited in the void, and by overgrowing the selectively deposited silicon a portion of the undercut areas is filled with silicon to form a corrugated post storage electrode. The pluralities of first (80) and second (82) film layers are then removed.

Abstract: A storage node 64 of a capacitor having increased charge storage capacity and a method for forming thereof. A doped polysilicon region 68 is formed. A thin layer of hemispherical grain polysilicon 70 is deposited over the doped polysilicon region 68. The doped polysilicon region 68 and the thin layer of hemispherical grain polysilicon 70 are etched using an etch chemistry that etches the doped polysilicon region 68 faster than the thin layer of hemispherical grain polysilicon 70 to increase the surface area of an upper surface 66 of the storage node 64.

Abstract: A method of forming thin epitaxial layers by subjecting a substrate to a high temperature prebake followed by a medium temperature capping seal and a low temperature deposition is disclosed. In a preferred embodiment the epitaxial layer is formed by low pressure chemical vapor deposition of dichlorosilane. The method has been demonstrated to alleviate the increase in autodoping and epitaxial defects normally associated with lowering the deposition temperature.