Patents by Inventor Robert A. Lester
Robert A. Lester has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060085671Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.Type: ApplicationFiled: December 1, 2005Publication date: April 20, 2006Inventors: Tim Majni, Gary Piccirillo, John MacLaren, Robert Lester, John Larson, Jerome Johnson, Benjamin Clark, Patrick Ferguson, Siamak Tavallaei, Jeffrey Autor, Christian Post, Dan Zink, Jeffery Galloway, Bret Roscoe
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Patent number: 7028213Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.Type: GrantFiled: September 28, 2001Date of Patent: April 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Tim Majni, Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark, Patrick L. Ferguson, Siamak Tavallaei, Jeffrey S. Autor, Christian H. Post, Dan Fink, Jeffery Galloway, Bret D. Roscoe
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Patent number: 7010652Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules.Type: GrantFiled: August 27, 2004Date of Patent: March 7, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark
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Patent number: 6981095Abstract: The control logic for a hot-pluggable memory cartridge for use in a redundant memory system. To implement a hot-pluggable memory cartridge in a redundant memory system, control logic to control the sequence of events for powering-up and powering-down a memory cartridge is provided.Type: GrantFiled: August 5, 2003Date of Patent: December 27, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: John M. MacLaren, Jerome J. Johnson, Robert A. Lester, Gary J. Piccirillo, John E. Larson, Christian H. Post, Jeffery Galloway, Ho M. Lai, Eric Rose
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Patent number: 6961800Abstract: Methods for improving processor performance. Specifically, by reducing some of the latency cycles within a host controller, request processing speed can be improved. One technique for improving processing speed involves initiating a deferred reply transaction before the data is available from a memory controller. A second technique involves anticipating the need to transition from a block next request (BNR) state to a bus priority request (BPRI) state, thereby eliminating the need to wait for a request check to determine if the BPRI state must be implemented.Type: GrantFiled: September 28, 2001Date of Patent: November 1, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert A. Lester, Kenneth T. Chin, Jim Blocker, John E. Larson, Phillip M. Jones, Paul B. Rawlins
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Patent number: 6854070Abstract: A method of adding memory capacity to a computer system. The computer system comprises a redundant memory system including a plurality of memory cartridges. By powering-down a memory cartridge, adding an additional memory module to the memory cartridge, and powering-up the memory cartridge for each memory cartridge in the system, the system can transition from a redundant mode of operation to a non-redundant mode of operation for each power-down, thus allowing the computer system to remain functional during the addition of the memory module. Alternatively, memory cartridges with higher memory capacity than those currently present in the computer system can be used to replace existing memory cartridges in the computer system, using the same techniques.Type: GrantFiled: January 25, 2001Date of Patent: February 8, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jerome J. Johnson, John M. MacLaren, Robert A. Lester, John E. Larson, Gary J. Piccirillo, Christian H. Post, Jeffery Galloway, Ho M. Lai, Anisha Anand, Eric Rose
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Publication number: 20050027951Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules.Type: ApplicationFiled: August 27, 2004Publication date: February 3, 2005Inventors: Gary Piccirillo, John MacLaren, Robert Lester, John Larson, Jerome Johnson, Benjamin Clark
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Patent number: 6832340Abstract: A system and technique for correcting data errors in a memory device. More specifically, data errors in a memory device are corrected by scrubbing the corrupted memory device. Generally, a host controller delivers a READ command to a memory controller. The memory controller receives the request and retrieves the data from a memory sub-system. The data is delivered to the host controller. If an error is detected, a scrub command is induced through the memory controller to rewrite the corrected data through the memory sub-system. Once a scrub command is induced, an arbiter schedules the scrub in the queue. Because a significant amount of time can occur before initial read in the scrub write back to the memory, an additional controller may be used to compare all subsequent READ and WRITE commands to those scrubs scheduled in the queue.Type: GrantFiled: January 25, 2001Date of Patent: December 14, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: John E. Larson, John M. MacLaren, Robert A. Lester, Gary J. Piccirillo, Jerome J. Johnson, Patrick L. Ferguson
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Publication number: 20040243884Abstract: A system includes a mechanism to detect addition of a memory module. In response to the addition of the memory module, a memory test is run to test the new memory module for a defect. If an uncorrectable error is detected, a routine is activated to process the error. Depending on whether the defect occurred in the new memory module or existing memory module(s), different processing is performed.Type: ApplicationFiled: May 28, 2003Publication date: December 2, 2004Inventors: Paul H. Vu, Darrell R. Haskell, Robert A. Lester, Timoth W. Majni
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Patent number: 6823424Abstract: A technique for selecting events associated with a hot-plug operation. More specifically, a programmable configuration register may be used to provide a mechanism for periodically scheduling requests associated with a hot-plug operation, such as initialization, rebuild, and verify requests. An arbiter is provided to facilitate an ordered access to a memory system. A user can select a periodic interval such that hot-plug requests are periodically executed during the execution of normal requests through the arbiter. The user-selectable interval may be dependent on the specific application of the system and the importance of operating in a redundant mode.Type: GrantFiled: September 28, 2001Date of Patent: November 23, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: John E. Larson, Robert A. Lester, Elizabeth A. Richard
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Patent number: 6785835Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The system supports DIMMs having X4 and X8 configurations. The system also transitions between various states, including a redundant state and a non-redundant state, to facilitate “hot-plug” capabilities utilizing its removable memory cartridges.Type: GrantFiled: January 25, 2001Date of Patent: August 31, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: John M. MacLaren, Paul Santeler, Kenneth A. Jansen, Sompong P. Olarig, Robert A. Lester, Patrick L. Ferguson, John E. Larson, Jerome J. Johnson, Gary J. Piccirillo
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Patent number: 6785785Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules.Type: GrantFiled: January 25, 2001Date of Patent: August 31, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark
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Publication number: 20040158685Abstract: Method and apparatus for improving processor performance. In some embodiments, processing speed may be improved by reusing data stored in a buffer during an initial request by subsequent requests. Assignment of temporary storage buffers in a controller may be made to allow for the potential for reuse of the data. Further, a hot buffer may be designated to allow for reuse of the data stored in the hot buffer. On subsequent requests, data stored in the hot buffer may be sent to a requesting device without re-retrieving the data from memory.Type: ApplicationFiled: February 12, 2003Publication date: August 12, 2004Inventors: Phillip M. Jones, Robert A. Lester, Jens K. Ramsey, William J. Walker, John E. Larson, James Andre, Paul Rawlins
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Patent number: 6766469Abstract: A method of replacing a memory module in a computer system. Specifically, a method for replacing a memory module in a segment of a redundant memory system, without powering-down the memory system.Type: GrantFiled: January 25, 2001Date of Patent: July 20, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: John E. Larson, John M. MacLaren, Jerome J. Johnson, Gary J. Piccirillo, Robert A. Lester, Christian H. Post, Jeffery Galloway, Anisha Anand, Ho M. Lai, Eric Rose
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Patent number: 6761629Abstract: A method for detecting a fuel leak in a compartment is provided. The compartment includes at least one inlet and an exhaust outlet that is coupled in flow communication with the compartment and in flow communication with a fan. The method includes determining a fan speed, measuring a fuel leak gas concentration value, determining a fuel leak gas concentration limit value within the compartment based on the determined fan speed, comparing the measured fuel leak gas concentration value with the determined fuel leak gas concentration limit value, and generating at least one of an alarm signal and a trip signal based on the comparison.Type: GrantFiled: October 7, 2003Date of Patent: July 13, 2004Assignee: General Electric CompanyInventors: William Andrew Parker, Gerald Wilson Grove, Robert Lester Brooks, Mark David D'Ambruoso
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Patent number: 6715116Abstract: A system and technique for detecting data errors in a memory device. More specifically, data errors in a memory device are detected by initiating an internal READ command or verify operation from a set of logic which is internal to the memory system in which the memory devices reside. Rather than relying on a READ command to be issued from an external device, via a host controller, the verify logic initiates verify routine in response to an event such as an operator instruction, hot-plug operation, or a periodic schedule. By implementing the verify operation, the system does not rely on external READ commands to verify data integrity. The verify routine may rely on typical ECC error logging mechanisms and may be used in a RAID memory architecture. Further, the verify routine may be used in conjunction with other error logging and correction logic, as well as scrubbing logic.Type: GrantFiled: January 25, 2001Date of Patent: March 30, 2004Assignee: Hewlett-Packard Company, L.P.Inventors: Robert A. Lester, John M. MacLaren, Patrick L. Ferguson, John E. Larson
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Publication number: 20040055746Abstract: A subterranean well completion has a tubular structure in which a remote controlled robot is permanently disposed. The robot is self-propelled, programmable, receives instructions from and communicates data to the surface, and is adapted to receive power from a downhole source and perform a variety of well tasks such as, for example, positioning valves and other well tools and sensing the values of predetermined downhole parameters and relaying the sensed information to the surface. The robot, which is operable without physical intervention through the tubular structure to the robot, propels itself to a location in the tubular structure at which a desired well task is to be performed, performs the task and then parks itself in the tubular structure until another well task is to be performed by the robot.Type: ApplicationFiled: September 24, 2002Publication date: March 25, 2004Inventors: Colby Munro Ross, Robert Lester Thurman, Syed Hamid, Clifford David Wohleb
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Patent number: 6675891Abstract: An apparatus for gravel packing a production interval (42) of a wellbore (32) comprises first and second sand control screen assemblies (56, 58) connected downhole of a packer assembly (46) and a cross-over assembly (40) that provides a communication path (74) downhole of the packer assembly (46) for a gravel packing fluid and a communication path (92) uphole of the packer assembly (46) for return fluids. A wash pipe assembly (66) extends into the first and second sand control screen assemblies (56, 58) forming an annulus (84) therebetween. A valve (70) is positioned within the wash pipe assembly (66) in a location between the first and second sand control screen assemblies (56, 58). The valve (70) is actuatable from a closed position to an open position when the beta wave (100) is proximate the location of the valve (70).Type: GrantFiled: December 19, 2001Date of Patent: January 13, 2004Assignee: Halliburton Energy Services, Inc.Inventors: Travis T. Hailey, Jr., Colby Munro Ross, Robert Lester Thurman, Robert Craig Hammett, David Leslie Lord, Imre I. Gazda
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Patent number: 6640282Abstract: The control logic for a hot-pluggable memory cartridge for use in a redundant memory system. To implement a hot-pluggable memory cartridge in a redundant memory system, control logic to control the sequence of events for powering-up and powering-down a memory cartridge is provided.Type: GrantFiled: January 25, 2001Date of Patent: October 28, 2003Assignee: Hewlett-Packard Development Company, L.P.Inventors: John M. MacLaren, Jerome J. Johnson, Robert A. Lester, Gary J. Piccirillo, John E. Larson, Christian H. Post, Jeffery Galloway, Ho M. Lai, Eric Rose
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Publication number: 20030111224Abstract: An apparatus for gravel packing a production interval (42) of a wellbore (32) comprises first and second sand control screen assemblies (56, 58) connected downhole of a packer assembly (46) and a cross-over assembly (40) that provides a communication path (74) downhole of the packer assembly (46) for a gravel packing fluid and a communication path (92) uphole of the packer assembly (46) for return fluids. A wash pipe assembly (66) extends into the first and second sand control screen assemblies (56, 58) forming an annulus (84) therebetween. A valve (70) is positioned within the wash pipe assembly (66) in a location between the first and second sand control screen assemblies (56, 58). The valve (70) is actuatable from a closed position to an open position when the beta wave (100) is proximate the location of the valve (70).Type: ApplicationFiled: December 19, 2001Publication date: June 19, 2003Inventors: Travis T. Hailey, Colby Munro Ross, Robert Lester Thurman, Robert Craig Hammett, David Leslie Lord, Imre I. Gazda