Patents by Inventor Robert A. Neal

Robert A. Neal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080241270
    Abstract: A composition to inhibit the formation of adhesions that may arise at a surgical site. The composition includes an antioxidant in a carrier. The carrier is comprised of cocamide diethanolamine, diethanolamine and glycerin. The composition may include additional additives, such as euricamide and a compound including a polyethylene resin, calcium carbonate and a concentrated form of the carrier. The composition is produced by heating the carrier to a temperature, preferably about 375° F. and then adding the additives. The mixture is heated at temperature long enough to cause the antioxidant to leach into the liquid. The mixture is then cooled at room temperature and maintained in liquid form for ease of application to the surgical site where adhesion formation inhibition is desired. The composition is preferably degradable in vivo.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Robert A. Neal, Robert B. Ray
  • Patent number: 7430725
    Abstract: A set of tools is provided herein that produces useful, proven, and correct integrated semiconductor chips. Having as input either a customer's requirements for a chip, or a design specification for a partially manufactured semiconductor chip, the tools generate the RTL for control plane interconnect; memory composition, test, and manufacture; embedded logic analysis, trace interconnection, and utilization of spare resources on the chip; I/O qualification, JTAG, boundary scan, and SSO analysis; testable clock generation, control, and distribution; interconnection of all of the shared logic in a testable manner from a transistor fabric and/or configurable blocks in the slice. The input customer requirements are first conditioned by RTL analysis tools to quickly implement its logic. The slice definition and the RTL shell provides the correct logic for a set of logic interfaces for the design specification to connect. The tools share a common database so that logical interactions do not require multiple entries.
    Type: Grant
    Filed: June 18, 2005
    Date of Patent: September 30, 2008
    Assignee: LSI Corporation
    Inventors: Robert Neal Carlton Broberg, III, Jonathan William Byrn, Gary Scott Delp, Michael K. Eneboe, Gary Paul McClannahan, George Wayne Nation, Paul Gary Reuland, Thomas Sandoval, Matthew Scott Wingren
  • Patent number: 7355318
    Abstract: A micromachined device for filtering mechanical vibrations caused by an external disturbance is disclosed. The device can include a first electrostatic vertical comb drive assembly having a first array of stationary elements and a second array of movable elements correspondingly interspersed with the first array. The device can also include a plurality of springs, each springs coupled between a support frame and a proof mass. The first drive assembly can be configured for motion in the z-direction. The device can include a sensor for sensing a position of the proof mass relative to the support frame by measuring displacement between each of the stationary and movable elements. The device can further include a second electrostatic vertical comb drive assembly. The device can have multiple electrostatic comb drive assemblies. An optional feedback network signal processes a displacement measurement to control one of the drive assemblies.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: April 8, 2008
    Assignee: Auburn University
    Inventors: Robert Neal Dean, Jr., George Timothy Flowers
  • Patent number: 7229303
    Abstract: A connector assembly (10) is provided including a first connector (12) and a second connector (14) configured to mateably engage the first connector (12). The first connector (12) includes a housing (16), a conductor assembly (18) positioned within the housing and projecting from housing, and a resilient seal member (30) enclosing an interface between the housing (16) and the portion of the conductor assembly projecting from the housing. The second connector (14) includes an outer contact (60), an inner contact (62) nested within a portion of the outer contact (60), and a housing (64) containing the inner and outer contacts. Conductors of the conductor assembly (18) of the first connector (12) engage the outer (60) and inner (62) contacts of the second connector (14). Another resilient seal member (45) includes a flexible skirt (50) formed at an end portion thereof.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: June 12, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Michel J. Vermoesen, William C. Kruckemeyer, Robert A. Neal, Kathleen Murphy
  • Publication number: 20060208463
    Abstract: An expanding independent load suspension system that incorporates a square walking beam, unique bushings, and multiple expanding sliding units to spread the load bearing tires evenly over the surface instead of grouping them close together. With the weight of the vehicle having the ability to pivot over three separate axes, it maintains an equal pressure on all the tires no matter what the surface conditions. Additional benefits are derived by the separation of the tires with the new design of the square walking beam causing less damage to the roadways. The vehicle has been designed to operate on the highways in the conventional ten-foot width, and then expand to a maximum of twenty feet to move large loads with the permits required.
    Type: Application
    Filed: March 18, 2005
    Publication date: September 21, 2006
    Inventors: Robert Neal, Troy Patterson
  • Publication number: 20060172576
    Abstract: A connector assembly (10) is provided including a first connector (12) and a second connector (14) configured to mateably engage the first connector (12). The first connector (12) includes a housing (16), a conductor assembly (18) positioned within the housing and projecting from housing, and a resilient seal member (30) enclosing an interface between the housing (16) and the portion of the conductor assembly projecting from the housing. The second connector (14) includes an outer contact (60), an inner contact (62) nested within a portion of the outer contact (60), and a housing (64) containing the inner and outer contacts. Conductors of the conductor assembly (18) of the first connector (12) engage the outer (60) and inner (62) contacts of the second connector (14). Another resilient seal member (45) includes a flexible skirt (50) formed at an end portion thereof.
    Type: Application
    Filed: December 13, 2005
    Publication date: August 3, 2006
    Inventors: Michel Vermoesen, William Kruckemeyer, Robert Neal, Kathleen Murphy
  • Publication number: 20060118052
    Abstract: A wild animal feeder is disclosed which is attachedly suspended form a tree or other stabilized element and may be horizontally and vertically suspended from same.
    Type: Application
    Filed: August 18, 2004
    Publication date: June 8, 2006
    Inventor: Robert Neal
  • Patent number: 7055113
    Abstract: A set of tools is provided herein that produces useful, proven, and correct integrated semiconductor chips. Having as input either a customer's requirements for a chip, or a design specification for a partially manufactured semiconductor chip, the tools generate the RTL for control plane interconnect; memory composition, test, and manufacture; embedded logic analysis, trace interconnection, and utilization of spare resources on the chip; I/O qualification, JTAG, boundary scan, and SSO analysis; testable clock generation, control, and distribution; interconnection of all of the shared logic in a testable manner from a transistor fabric and/or configurable blocks in the slice. The input customer requirements are first conditioned by RTL analysis tools to quickly implement its logic. The slice definition and the RTL shell provides the correct logic for a set of logic interfaces for the design specification to connect. The tools share a common database so that logical interactions do not require multiple entries.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: May 30, 2006
    Assignee: LSI Logic Corporation
    Inventors: Robert Neal Carlton Broberg, III, Jonathan William Byrn, Gary Scott Delp, Michael K. Eneboe, Gary Paul McClannahan, George Wayne Nation, Paul Gary Reuland, Thomas Sandoval, Matthew Scott Wingren
  • Patent number: 7017093
    Abstract: An apparatus including a first circuit, a second circuit, and a third circuit. The first circuit may be configured to receive a plurality of input signals and present one of the plurality of input signals as a data signal in response to a control signal. The second circuit may be configured to generate the control signal and generate a trace data stream in response to the data signal. The third circuit may be configured to receive and store the trace data stream and read and present the stored trace data stream in response to one or more commands.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: March 21, 2006
    Assignee: LSI Logic Corporation
    Inventor: Robert Neal Carlton Broberg, III
  • Patent number: 6959428
    Abstract: A register address generation tool is used during the design of semiconductor products. For those registers and/or memories that are addressable on a bus, the register address generation tool creates the interconnect RTL, header files, static timing analysis constraint files, and verification testcases. The tool also maintains coherence between what has been generated and the available resources for the design of the semiconductor product in a design. If there are any registers and/or memories that are not being used, the register address generation tool may further generate the RTL that will convert these unused resources to performance-enhancing features such as control registers, status registers, etc. The register address generation tool read a design database having an application set to determine what hardmacs and what transistor fabric is available. It also receives as input a bus specification and address parameters.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: October 25, 2005
    Assignee: LSI Logic Corporation
    Inventors: Robert Neal Carlton Broberg, III, Troy Evan Faber, Gary Scott Delp, Paul Gary Reuland, Daniel James Murray
  • Publication number: 20050058525
    Abstract: A battery terminal bolt preferably having a head portion, a washer portion, a sealing portion and a threaded portion. The sealing portion is disposed between the washer portion and the threaded portion and is preferably in the form of a frustoconical shape that allows the bolt to be substantially sealed when placed in an insert mold. The battery terminal bolt's washer portion has a geometry that substantially reduces abusive field torque failures and also provides increased pull-out strength. In a preferred embodiment, the washer portion contains semi-circular projections in a radial pattern around longitudinal axis of the battery terminal bolt.
    Type: Application
    Filed: September 16, 2003
    Publication date: March 17, 2005
    Inventors: Peter Bakos, Robert Neal
  • Publication number: 20040256451
    Abstract: A smart card personalization system provides an interface to smart card personalization stations and to external computing or data resources which normally are not available directly to personalization station. A card issuer management systems prepares card objects and assigns a unique card object identifier. A smart card personalization server receives the card objects from the card issuer management system. A smart card personalization controller receives the unique card object identifiers and routes the card object identifiers to waiting personalization stations. The personalization stations use the card object identifier to request data and services from the smart card personalization server in order to personalize the smart card. The services provided by the smart card personalization server include data services, security services and support services. The smart card personalization server supports multiple active personalization station sessions.
    Type: Application
    Filed: October 23, 2003
    Publication date: December 23, 2004
    Applicant: UBIQ Incorporated.
    Inventors: Robert Neal Goman, Denis C. Burand, Thomas L. Younger
  • Publication number: 20040261050
    Abstract: A register address generation tool is used during the design of semiconductor products. For those registers and/or memories that are addressable on a bus, the register address generation tool creates the interconnect RTL, header files, static timing analysis constraint files, and verification testcases. The tool also maintains coherence between what has been generated and the available resources for the design of the semiconductor product in a design. If there are any registers and/or memories that are not being used, the register address generation tool may further generate the RTL that will convert these unused resources to performance-enhancing features such as control registers, status registers, etc. The register address generation tool read a design database having an application set to determine what hardmacs and what transistor fabric is available. It also receives as input a bus specification and address parameters.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventors: Robert Neal Carlton Broberg, Troy Evan Faber, Gary Scott Delp, Paul Gary Reuland, Daniel James Murray
  • Publication number: 20040128641
    Abstract: A set of tools is provided herein that produces useful, proven, and correct integrated semiconductor chips. Having as input either a customer's requirements for a chip, or a design specification for a partially manufactured semiconductor chip, the tools generate the RTL for control plane interconnect; memory composition, test, and manufacture; embedded logic analysis, trace interconnection, and utilization of spare resources on the chip; I/O qualification, JTAG, boundary scan, and SSO analysis; testable clock generation, control, and distribution; interconnection of all of the shared logic in a testable manner from a transistor fabric and/or configurable blocks in the slice. The input customer requirements are first conditioned by RTL analysis tools to quickly implement its logic. The slice definition and the RTL shell provides the correct logic for a set of logic interfaces for the design specification to connect. The tools share a common database so that logical interactions do not require multiple entries.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Applicant: LSI Logic Corporation
    Inventors: Robert Neal Carlton Broberg, Jonathan William Byrn, Gary Scott Delp, Michael K. Eneboe, Gary Paul McClannahan, George Wayne Nation, Paul Gary Reuland, Thomas Sandoval, Matthew Scott Wingren
  • Publication number: 20040054815
    Abstract: An apparatus comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to receive a plurality of input signals and present one of the plurality of input signals as a data signal in response to a control signal. The second circuit may be configured to generate the control signal and generate a trace data stream in response to the data signal. The third circuit may be configured to receive and store the trace data stream and read and present the stored trace data stream in response to one or more commands.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventor: Robert Neal Carlton Broberg
  • Patent number: 6655512
    Abstract: A vehicle damper includes a valve having of an imperforate, deflectable variable orifice disk with an outer periphery that is only partially clamped against a valve seat, during low velocity operation of the damper, by a variable orifice support disk having an outer periphery that is not coextensive with the outer periphery of the variable orifice disk. The portion of the outer periphery of the variable orifice disk that is not clamped against the valve seat deflects away from the valve seat during low velocity operation of the damper, in response to force on the variable orifice plate generated by pressure of fluid in flow apertures closed off by the variable orifice plate, to provide a variable orifice for fluid flow through the valve and digressive performance of the damper. The valve may take the form of a compression or rebound valve on the piston of the vehicle damper, or a base valve in a dual tube damper.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: December 2, 2003
    Assignee: Delphi Technologies, Inc.
    Inventors: Jamshid K. Moradmand, Marcin Knapczyk, Robert A. Neal
  • Patent number: 6658519
    Abstract: A transaction tracing circuit for use with a bus bridge that is couplable to at least a first and second bus. The transaction tracing circuit includes at least one set of trace control registers that is associated with a transaction tracing function for tracing a specific transaction occurring on the bus bridge. A number of bus transaction tracing circuits, one for each bus to which the bridge is connected, are coupled to the trace control registers and are utilized to store is transactions that are captured as they occur on the individual buses. An internal transaction tracing circuit is coupled to the trace control registers and is utilized for storing captured internal transaction information corresponding to the specific internal transaction.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Robert Neal Broberg, III, Paul B. Kubista, Daniel Frank Moertl, Daniel Paul Wetzel
  • Patent number: PP15900
    Abstract: Disclosed herein is a new and distinct variety of pawpaw tree, which has been given the name ‘Levfiv.’ This variety is distinguished by its all-around excellent fruit quality consisting of large, firm, fleshy, thick skinned fruits with an unusually low seed-to-fruit ratio and an excellent flavor. This variety possess the fleshiest and firmest fruit in pawpaws found to date. The texture is firm and smooth. The number of fruit per cluster is low, often in singles, which simplifies harvesting. The fruit possesses a color break at picking stage which is a major advantage in harvesting the fruit. The fruit firmness plus the thick skin will help in shipping and handling. This variety is one of three varieties newly identified as having potential to establish a commercial pawpaw industry.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: August 2, 2005
    Inventor: Robert Neal Peterson
  • Patent number: PP14452
    Abstract: Disclosed herein is a new and distinct variety of pawpaw tree, which has been given the name ‘Wansevwan.’ This variety is distinguished by good yields, atypical of pawpaw, and by its excellent fruit quality. Fruit are large with a low seed-to-fruit ratio, and possess the finest flavor found in pawpaws to date. The texture is melting, yet firmer than average which may help in shipping and handling. The number of fruit per cluster is low, often in singles, which simplifies harvesting. This variety is one of three varieties newly identified as having potential to establish a commercial pawpaw industry.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: January 13, 2004
    Inventor: Robert Neal Peterson
  • Patent number: PP14453
    Abstract: Disclosed herein is a new and distinct variety of pawpaw tree, which has been given the name ‘Aidfievate.’ This variety is distinguished by good yields (atypical of pawpaw), by excellent harvesting characteristics and by good fruit quality. The leaf aspect is unique among pawpaws, being horizontal rather than drooping, which allows fruit to be more easily seen and picked. Fruit display a dependable, readily visible color break at ripeness which speeds picking. The number of fruit per cluster is low, often in singles, which simplifies harvest. Fruit quality is high as fruit are medium to large in size with a low seed-to-fruit ratio, are very consistent in size and shape, and possess a very good flavor. Skin is medium-thick and fruit texture is firm which helps in shipping and handling. This variety is one of three varieties newly identified as having potential to establish a commercial pawpaw industry.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: January 13, 2004
    Inventor: Robert Neal Peterson