Patents by Inventor Robert A. Rust

Robert A. Rust has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6397293
    Abstract: A Redundant Array of Independent Disks (RAID) data storage system includes an AutoRAID memory transaction manager for a disk array controller that enables a consistent, coherent memory image of the data storage space to all processors across hot-plug interfaces. To external processes seeking to read or write data, the memory image looks the same across the hot-plug interface. The disk array controller has two identical controllers, each with its own non-volatile memory, to maintain redundant images of disk array storage space. A hot-plug interface interconnects the two controllers. Each controller has an AutoRAID memory transaction manager that enables sharing of cyclic redundancy check (CRC)-protected memory transactions over the hot-plug interface between the two controllers. The AutoRAID memory transaction managers also facilitate ordered execution of the memory transactions regardless of which controller originated the transactions.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: May 28, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Steven L. Shrader, Robert A. Rust
  • Publication number: 20010001871
    Abstract: A disk array controller enables a consistent, coherent memory image of the data storage space to all processors across hot-plug interfaces. To external processes seeking to read or write data, the memory image looks the same across the hot-plug interfaces. The disk array controller has two identical controllers, each with its own non-volatile memory, to maintain redundant images of disk array storage space. A hot-plug interface interconnects the two controllers. Each controller has an AutoRAID memory transaction manager that enables sharing of CRC-protected memory transactions over the hot-plug interface between the two controllers. The AutoRAID memory transaction managers also facilitate ordered execution of the memory transactions regardless of which controller originated the transactions. Mirrored read and write transactions are handled atomically across the hot-plug interface.
    Type: Application
    Filed: January 19, 2001
    Publication date: May 24, 2001
    Inventors: Steven L. Shrader, Robert A. Rust
  • Patent number: 6230240
    Abstract: A storage management system for a Redundant Array of Independent Disks (RAID) data storage system and an AutoRAID memory transaction manager for a disk array controller are disclosed. The disk array controller enables a consistent, coherent memory image of the data storage space to all processors across hot-plug interfaces. To external processes seeking to read or write data, the memory image looks the same across the hot-plug interface. The disk array controller has two identical controllers, each with its own non-volatile memory, to maintain redundant images of disk array storage space. A hot-plug interface interconnects the two controllers. Each controller has an AutoRAID memory transaction manager that enables sharing of cyclic redundancy check (CRC)-protected memory transactions over the hot-plug interface between the two controllers.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: May 8, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Steven L. Shrader, Robert A. Rust
  • Patent number: 6098190
    Abstract: A memory system constructed in accordance with the invention receives data blocks and associated host LBAs from a host processor. The memory subsystem initially associates a check value with each received data block, each check value dependent upon a host LBA that is associated with the respectively received data block. The memory subsystem stores each received data block and associated check value as an "extended" data block. Thereafter, the memory subsystem, in response to a host processor request to access data corresponding to the associated host LBA, recovers the stored extended data block and determines from the check value stored therewith, if the address of the corresponding data and that provided by the host processor correspond. If the addresses correspond, the data block is transmitted to the host processor. If not, an error message is generated.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: August 1, 2000
    Assignee: Hewlett-Packard Co.
    Inventors: Robert A. Rust, Michael B. Jacobson, Christine Grund
  • Patent number: 5978928
    Abstract: A system and method for managing a time stamp wherein a table of time stamps is maintained. Each time stamp corresponds to the age of a block of data. The age of the data is determined from the value of the time stamp in the table. When a block of data is written, the time stamp corresponding to the data is individually reset by writing a zero to the stamped value. Each stamp is aged by updating the time stamps at predetermined time intervals. Aging a time stamp includes reading the time stamp, determining whether to advance the time stamp, and advancing the time stamp. A random number is generated for each time stamp. The random number is compared to an increment threshold value. If the random number matches the increment threshold value, the time stamp is incremented.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: November 2, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5901251
    Abstract: The present invention provides a method for compressing image data. The method first detects a pattern in a first subset of the image data, where the second subset being collocated to a second subset. If no pattern is detected, then a text mode context model is selected. If a pattern is detected, then the period of the pattern is detected and a pattern mode context model is selected. The pattern mode context model has a width directly related to the period of the pattern detected. An arithmetic compressor compresses the second subset using the selected context model.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: May 4, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5886655
    Abstract: The present invention provides improved compression ratios for small data sets with only a minor impact of the compression ration of larger data sets by rapidly tracking the statistics at the beginning of the compression run, slowing down to a traditional pace as the size increases. This is accomplished by limiting the size of the probability table at the start. As more data passes through the compressor, the size of the table is expanded. The size of the probability is controlled by gradually opening the context window for limited number of bytes at the beginning of the data set.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: March 23, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5880688
    Abstract: The present invention provides improved compression ratios for small data sets with only a minor impact of the compression ration of larger data sets by selecting a context model optimized for the size of the data set being processed. The size of the original data is determined. Based on the size, a context model is selected. The original data is compressed into the compressed data using the context model. Any number of context models may be defined and appropriate values chosen. To decompress, it is necessary to select a context model based on the size of the original data. Two ways of detecting the correct context model are described. First, the size of the original data is part of the compressed data. Alternatively, an indicator, identifying which context model was used to compress the original data, is part the compressed data.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: March 9, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5857035
    Abstract: The present invention looks for large regions of white or black pixels. In those regions, it is very likely the next few pixels will continue to be the same all white/black value. The present invention replaces the actual encoding of those pixels with whether or not the multi-bit jump was a success. If the jump was unsuccessful then each of the bits unsuccessfully jumped over is encoded using a predefined location in the probability table.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: January 5, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5781308
    Abstract: A system converts a source image into destination image pixels that are binary. The system includes a memory which stores at least a portion of a row of source grey level pixels, and a corresponding row of a threshold matrix of plural rows of grey level pixel values, each row including at least W pixel values. A scale register stores N source grey level pixel values that have been scaled to match N grey level destination image pixel locations. A threshold register outputs, in parallel, up to N of the W threshold pixel values. Alignment logic controllably enters the threshold pixel values into the threshold register. A controller operates the alignment logic to enter the W threshold pixel values into N contiguous storage positions in the threshold register, and if W greater than N, enables entry of excess ones of the W threshold pixel values into contiguous storage positions in the threshold register after the (W-N) previously entered threshold pixel values have been outputted.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: July 14, 1998
    Assignee: Hewlett-Packard Company
    Inventors: David B. Fujii, Robert A. Rust
  • Patent number: 5778158
    Abstract: A system converts a source image, which may include plural grey level source pixels at a first resolution level, to a destination image at a second resolution level. The system employs a scaling subsystem including a memory which stores at least a portion of a row of source pixels, a scale factor and a relative input index array (RIIA) comprising a single index bit for each column of the destination image. Each index bit enables a grey level source pixel to be identified to be used in scaling of the source image to the second resolution. A scale logic circuit is responsive to each index bit and the source pixels, to associate at least one source pixel with each column of the destination image. The scaling subsystem further includes a control processor which calculates the RIIA based upon the scale factor stored in the memory.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: July 7, 1998
    Assignee: Hewlett-Packard Company
    Inventors: David B. Fujii, Robert A. Rust, David Hershberger
  • Patent number: 5771105
    Abstract: A system converts a source image of grey level pixel values into a destination image of binary pixel values, the source and destination images having different levels of resolution. The system includes a memory which stores at least a portion of a row of source pixels, a corresponding row of a grey level threshold matrix and a relative input index array (RIIA) which employs a single index bit for each column of the destination image. Index bits are read from the memory and placed in an index bit register, and N source pixel values are written into a source register. A scale logic circuit includes N destination image column outputs and is responsive to each index bit, to output one grey level source pixel on each output. An alignment switch is responsive to a clock input to provide N threshold pixel value outputs that are aligned with corresponding destination image pixels.
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: June 23, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Robert A. Rust, David B. Fujii
  • Patent number: 5745608
    Abstract: A arithmetic coding data compression and decompression method for storing compressed data in non-contiguous memory. As the data is compressed and stored in memory, any non-contiguous segments are properly marked. Such marking requires that the last location contains a pointer to the next memory location used. Just prior to the pointer a special "LINK" sequence is stored. Thus, when the compressor completes its job, the non-contiguous memory is logically linked together. During decompression, if the decompressor encounters an illegal sequence, the decompressor must determine if this is an error condition or an indication that an address follows. If the illegal sequence is "LINK" the next location contains a pointer to the remaining compressed data. If that pointer is zero, then all the compressed data has been processed. If the address is non-zero, the decompressor jumps to the new address and continues de-compressing.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: April 28, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5745603
    Abstract: An encoding method that allows the use of previous line data without requiring multiple accesses to the image or the use of a line buffer. The image, which is to be compressed, is divided into columns. Each column is traversed vertically. Each row within a column is compressed by horizontally moving across the row. After a row is compressed the next row in transferred to the compressor. Once a column is compressed, the compressor continues at the top of the next column. This process continues until all the columns have been compressed. By vertically traversing through the image, information about the previous row is limited by the width of the column. This limited storage of the previous row allows use of a two dimensional context model, which greatly increases the compression ratio.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: April 28, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5680601
    Abstract: A method for reducing the amount of memory used to store an original data in a processing system by reducing the occurrence of a literal prefix. The method is completed by comparing strings from the original data to valid elements in a dictionary. If a match is found, then a data code, which points to the valid dictionary element, is stored as compressed data in the memory. If a match is not found, then the entry is defined as a literal. Assuming the literal is defined, next determine if a dictionary element pointed to by the literal is valid and if so, then store a literal prefix into the compressed data in the memory. Finally, independent of whether the lateral points to a valid dictionary element, the literal itself is stored into the compressed data in the memory. To decompress the compressed data first an entry of the compressed data is retrieved from the memory. If the entry is a literal prefix, then output a next entry of the compressed data.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: October 21, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Robert A. Rust
  • Patent number: 5574953
    Abstract: A data compression and decompression method for storing compressed data in non-contiguous memory. As the data is compressed and stored in memory, any non-contiguous segments are properly marked. Such marking requires that the last location contains a pointer to the next memory location used. Just prior to the pointer a special "LINK" code is stored. Thus, when the compressor completes its job, the non-contiguous memory is logically linked together. To decompress the compressed data, a code of the compressed data is retrieved from the non-contiguous memory. If the code is a link code, then an address pointer to the next location in memory where the next compressed data is stored is retrieved from memory. If, in the alternative, the code in not a link code then the code is decompressed.
    Type: Grant
    Filed: August 19, 1994
    Date of Patent: November 12, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Robert Rust, Roger L. Pennington
  • Patent number: 5517601
    Abstract: An apparatus derives data to enable a fill action during operation of a print device along a scan line. The apparatus includes a processor which determines, for each of a sequence of contours of a glyph, point of intersection values between a scan line and the contours. The sequential point of intersection values indicate OFF-to-ON and ON-to-OFF transitions required of the print device. Sequential OFF-to-ON and ON-to-OFF transitions comprise a transition pair. The apparatus includes a memory comprising 2N storage positions for storage of N transition pairs. Comparator circuitry is coupled in parallel to the 2N storage positions. A controller operates the comparator circuitry to determine an order of all OFF-to-ON point of intersection values and an order of all ON-to-OFF point of intersection values in the 2N storage positions.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: May 14, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Robert Rust, Eugene A. Roylance
  • Patent number: 5487138
    Abstract: Because laser printers are capable of rendering only a maximum number of characters per unit time, pervious printer would pre-render the entire page prior to print the page. This pre-rendering process greatly increases the memory requirements. To overcome this problem, there is provided a method for reducing memory requirements in a laser printer when printing a page of characters. First, the page is divided into a series of strips. Next, the entire page is scanned strip by strip for any strips that contain an excess number of characters, where the excess number is that number of character that exceeds the maximum number the printer can render in the given time. Assuming a complex strip is found, any common characters in the complex strips are prerendered. If, after pre-rendering the common characters any strip is still complex, then the excess characters are pre-rendered.
    Type: Grant
    Filed: September 2, 1993
    Date of Patent: January 23, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Robert A. Rust, Wayne A. Overby
  • Patent number: 5442664
    Abstract: A modulator for a clock pulse generator receives clock pulses from a clock pulse source, which clock pulses exhibit a reference phase. Delay circuitry is connected to the clock pulse source and includes n tap connections, each connection providing a clock pulse that is delayed by a different phase delay from the reference phase. A multiplexer is connected to each of the n tap connections and provides an output manifesting the clock pulses. A selector circuit controls the multiplexer to sequentially connect any sequence of different ones of the n tap connections to the multiplexer's output, whereby the output manifests a series of clock pulses which have different phase displacements from the reference phase.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: August 15, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Robert Rust, Phillip R. Luque, Derek L. Knee