Patents by Inventor Robert C. Dobkin

Robert C. Dobkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4318089
    Abstract: An improved infrared detector system includes a pair of thin film thermopile sensing elements that receives reflected energy from aspheric reflectors that are designed to provide optimum energy resolution. An absorbing coating can be placed above the sensors and extending beyond the periphery to improve the signal to noise ratio. A high gain low noise D.C. amplifier is coupled to the output of the infrared sensing elements while a high pass amplifier and low pass amplifier are designed to pass an amplified signal in the frequency range from approximately 0.2 Hz to 15 Hz. Finally, a combined peak detector and time dependent integrator summing amplifier circuit provides an enabling predetermined threshhold detection gate that requires either a predetermined large signal level or a multiple of small electrical signals within a preselected interval to produce an alarm enabling signal.
    Type: Grant
    Filed: March 24, 1980
    Date of Patent: March 2, 1982
    Assignee: David Frankel
    Inventors: Denes E. Frankel, Robert C. Dobkin, Barry G. Broome
  • Patent number: 4239986
    Abstract: An arrangement for controlling power during any given half cycle of AC power is disclosed herein and includes a gated switching device connected across an AC voltage supply, and a charging capacitor also connected with the supply voltage and adapted to discharge into the gate of the switching device for firing the latter under predetermined, externally controlled conditions. A low voltage control circuit is also disclosed herein and is especially suitable for use with the switch arrangement just recited, specifically for causing the capacitor to discharge at a particular point during a particular half cycle in the AC voltage supply.
    Type: Grant
    Filed: September 8, 1978
    Date of Patent: December 16, 1980
    Assignee: Hyrbrinetics, Inc.
    Inventor: Robert C. Dobkin
  • Patent number: 4232271
    Abstract: In an instrumentation amplifier a differential input is provided, one side of which is connected to an instrument ground that is remote from the amplifier power supply ground. The remote ground can, under some conditions, operate at a potential that is outside the potential span of the amplifier power supply. Such common mode potentials are difficult to cope with when the difference exceeds about 0.6 volt. The circuit employs a pair of transistors biased to equal current densities. The emitters constitute the circuit input terminals. Means are provided to adjust the transistor collector to base voltage to establish a constant predetermined current. The transistor that is to be connected to the remotely grounded input has a resistor coupled between emitter and base to produce a reference current. A resistor connected between the transistor bases will then assume a potential equal to the emitter potential difference. A current mirror reproduces the base resistor current at the amplifier output terminal.
    Type: Grant
    Filed: February 5, 1979
    Date of Patent: November 4, 1980
    Assignee: National Semiconductor Corporation
    Inventors: Robert C. Dobkin, Tim D. Isbell, Bernard D. Miller, Lawrence R. Sample
  • Patent number: 4225878
    Abstract: In a monolithic integrated circuit, on-chip trimming is implemented by connecting a zener diode across each element of a plural element trimmable resistor. Adjacent diodes are connected back to back and a pair of conventional bonding pads connected thereto. In trimming, when it is desired to short out one of the trimmable elements, the associated diode is subjected to an overload pulse by means of test probes applied to the bonding pads. Since the diodes are connected back to back, the pulse polarity will determine which diode is overloaded in the reverse bias condition. Thus, the trimmable element to be shorted is determined by pulse polarity and only one bonding pad is needed for each pair of trimmable elements.
    Type: Grant
    Filed: March 8, 1979
    Date of Patent: September 30, 1980
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4224564
    Abstract: A statistically enhanced ratio-matched network in a circuit chip is disclosed. The network may be either a resistance network or a capacitance network. In a ratio-matched resistance network, such as an R-2R resistance ladder, a plurality of resistances in a circuit chip have a rational ratio of resistance values to each other. All of the resistances each consists of an integral number of simultaneously fabricated resistors of approximately uniform dimensions, and certain critical resistances each consists of a series-parallel combination of the resistors for statistically enhancing the accuracy of the rational ratio of the critical resistances to each other.
    Type: Grant
    Filed: June 1, 1978
    Date of Patent: September 23, 1980
    Assignee: National Semiconductor Corporation
    Inventors: Robert C. Dobkin, James B. Cecil, Joseph J. Connolly, Jr.
  • Patent number: 4207481
    Abstract: In an IC having a power dissipating element, an integral thermocouple is located so as to respond to the thermal gradient in the IC chip that results from such power dissipation. Control circuitry, also on chip, responds to the thermocouple output and acts to limit dissipation to produce a predetermined maximum thermal gradient.
    Type: Grant
    Filed: October 27, 1977
    Date of Patent: June 10, 1980
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4176308
    Abstract: A voltage regulator including a current regulator for maintaining predetermined currents in the voltage regulator is disclosed. The voltage regulator includes an output terminal for providing an output voltage; an adjustment terminal; and a control circuit connected to the output terminal at a level that differs from the voltage at the adjustment terminal by a predetermined voltage difference. The control circuit of the voltage regulator includes a resistive divider coupled between the output terminal and the adjustment terminal; a pair of transistors having their collectors connected in common and their bases respectively coupled to the resistive divider to provide a portion of the voltage difference between the output terminal and the adjustment terminal across their bases.
    Type: Grant
    Filed: September 21, 1977
    Date of Patent: November 27, 1979
    Assignee: National Semiconductor Corporation
    Inventors: Robert C. Dobkin, Robert A. Pease
  • Patent number: 4153909
    Abstract: In a lateral transistor structure, an auxiliary collector is interposed between the emitter and the main collector for controlling the flow of injected current carriers to the main collector. Alternatively, the main collector may be utilized for sensing the state of saturation of the interposed auxiliary collector. One or both of the main and auxiliary collector structures may be segmented to provide various function. In the case where only the auxiliary collector is segmented, the output on the main collector is proportional to the number of auxiliary collector segments biased to allow the injected current to pass to the main collector. Alternatively, a plurality of auxiliary collectors may be interposed in with the injected current series between the emitter and the main collector to provide an output at the main collector only if each and every one of the auxiliary collectors is biased for gating of current therethrough to the main collector. Such a device is particularly useful as an AND gate.
    Type: Grant
    Filed: December 10, 1973
    Date of Patent: May 8, 1979
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4146903
    Abstract: A system for limiting power dissipation in a power transistor to less than a destructive level is disclosed. The power transistor includes a base and a power emitter in the base. The system includes a sense emitter positioned close to the power emitter in the base and a reference emitter positioned in a base at a remote position that would not be heated by the heat dissipated by the power emitter for providing an indication of the temperature gradient between the power emitter and the remote position induced by power dissipated in the power emitter by sensing the voltage difference between the sense emitter and the reference emitter. The system further includes a differential amplifier responsive to the indication of the temperature gradient for limiting power dissipation in the power transistor by reducing the power provided to the power transistor when the indication reaches a predetermined level.
    Type: Grant
    Filed: September 16, 1977
    Date of Patent: March 27, 1979
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4136354
    Abstract: A power transistor in which power dissipation may be limited to less than a destructive level is disclosed. The power transistor includes a base; a power emitter in the base; a sense emitter positioned in the base sufficiently close to the power emitter for enabling the temperature of the power emitter to be indicated as a function of the voltage across the junction of the base and the sense emitter; and a reference emitter positioned in a base at a remote position that would not be heated by the heat dissipated by the power emitter for enabling the temperature at the remote position to be indicated as a function of voltage across the junction of such base and the reference emitter. A voltage difference proportional to the temperature gradient in the power emitter induced by power dissipated in the power emitter can be sensed between the sense emitter and the reference emitter. Power dissipation in the power transistor may be limited in response to the sensed voltage difference.
    Type: Grant
    Filed: September 15, 1977
    Date of Patent: January 23, 1979
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4126826
    Abstract: A transformer primary is first biased with a current sustained at least long enough for any secondary voltage to drop to zero. Then the primary is open circuited. The resultant secondary voltage is coupled to a constant voltage device such as a shunt regulator. A voltage related to the shunt regulator voltage will then appear in the open circuited primary and will be available for measurement fully isolated from the secondary. If the shunt regulator is made to operate as a function of a condition to be measured, an isolated remote measure of the condition is present at the primary of the transformer.
    Type: Grant
    Filed: September 19, 1977
    Date of Patent: November 21, 1978
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4124808
    Abstract: A comparator amplifier circuit is integrated in MOS form. A sense amplifier section is coupled to a buffer amplifier section to provide an output that changes sharply at a particular voltage input. A compensating amplifier section is coupled between the comparator amplifier and a node in the buffer amplifier so that the voltage sense is independent of integrated circuit manufacturing variables.
    Type: Grant
    Filed: January 28, 1977
    Date of Patent: November 7, 1978
    Assignee: National Semiconductor Corporation
    Inventors: Mark S. D. Shieu, Ronald C. Laugesen, Robert C. Dobkin
  • Patent number: 4071813
    Abstract: A temperature sensor includes a pair of transistors each connected in series with a respective one of a pair of resistors across a source of voltage. The emitters of the transistors are connected together and the collectors are connected to a respective input of a differential amplifier. An output of the amplifier drives a voltage divider circuit having a pair of outputs each connected to the base of a respective one of the transistors. The transistors are operated at different current densities and the ratio of such current densities is maintained constant with changes in temperature by feedback from the amplifier which has an output which is proportional to absolute temperature. In a second embodiment the supply voltage is generated by a current source, such that it will vary with changes in the load thereon.
    Type: Grant
    Filed: September 23, 1974
    Date of Patent: January 31, 1978
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4004462
    Abstract: A temperature transducer includes a temperature sensor, a voltage regulator connected in parallel with the sensor, and a differential amplifier having one input thereof connected to the output of the sensor. An output of the differential amplifier is connected through an amplifier to an output terminal and a second input to the operational amplifier is disposed for connection to an external circuit or to the output terminal of the transducer. The temperature sensor includes a current inverter connected to a pair of transistors to maintain the ratio of their current densities constant with changes in temperature. The difference of the base-emitter voltages of the transistors operating at different current densities is directly proportional to temperature in degrees Kelvin. This difference of the base-emitter voltages is developed across an output resistor which is connected to an appropriate input of the differential amplifier.
    Type: Grant
    Filed: June 7, 1974
    Date of Patent: January 25, 1977
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 3982263
    Abstract: A large value resistor is formed during the standard processing steps in the fabrication of a monolithic integrated circuit device, the resistor being formed by a vertical channel FET, the channel of the FET being formed during diffusion of the isolation regions for the device, this diffusion extending down through the epitaxial layer of the device and through a channel defining opening in a buried layer region between the epitaxial layer and the substrate of the device.
    Type: Grant
    Filed: March 12, 1975
    Date of Patent: September 21, 1976
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 3978322
    Abstract: A system for measuring the accuracy of an internal timing source of a device having a light emitting display which is energized at a rate derived from the timing cycle of that timing source includes an optical pickup disposed for receiving light emission from one element of the display and generating a signal having the same frequency as the frequency of such light emission. In one embodiment, the pulses of that signal which occur within a given time period are counted and the number of such counted pulses is supplied to a display for human recognition. In a second embodiment, the time elapsed during one or more complete light emitting cycles is measured and displayed for human recognition. The pulses of a timing signal having a period of one microsecond which occur during one or more complete light emitting cycles are counted and the resultant count is displayed.
    Type: Grant
    Filed: September 30, 1974
    Date of Patent: August 31, 1976
    Assignee: National Semiconductor Corporation
    Inventor: Robert C. Dobkin