Abstract: There is disclosed various embodiments of an implantable anchor for permanently anchoring a medical lead. The implantable anchor may include a body having a longitudinal lumen, an access opening defined within a side of the body and in communication with the longitudinal lumen, a locking opening defined on an interior surface of the body, an arm having an interior face, the arm rotatably coupled to the body such that the arm is movable from a first position in which the arm covers the access opening to a second position in which the arm does not cover the access opening, and a locking feature protruding from the interior face of the arm and sized to extend into the locking opening.

Abstract: A method for forming a semiconductor structure having a transistor region and an optical device region includes forming a transistor in and on a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer, wherein a gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and wherein the transistor is formed in the transistor region of the semiconductor structure. The method also includes forming a waveguide device in the optical device region, wherein forming the waveguide device includes exposing a portion of the second semiconductor layer in the optical device region; and epitaxially growing a third semiconductor layer over the exposed portion of the second semiconductor layer.

Abstract: In one aspect, an apparatus is provided for securing an electrical stimulation lead in position in a person's brain. The apparatus includes a body configured to seat within a burr hole formed in the person's skull. The apparatus also includes a central elastic membrane coupled to the body and extending across a central aperture of the body. The elastic membrane includes a number of pre-formed openings provided for purposes of securing the lead in position within the brain after implantation. Each pre-formed opening may penetrate through an entire thickness of the elastic membrane. Each pre-formed opening may be selected for insertion of the lead into the brain. Each pre-formed opening is adapted to elastically expand as the lead is inserted through the pre-formed opening and positioned in the brain and is adapted to elastically contract on the lead to secure the lead in position within the brain after implantation.

Abstract: To improve the mechanical strength of a wafer comprising a low-k dielectric layer, the low-k dielectric layer is formed so as to have certain regions of low dielectric constant and the remainder having a higher mechanical strength. The higher-strength regions may have a relatively-higher value of dielectric constant. Selective ultraviolet curing of a dielectric material can be performed so as to expel a porogen from the region(s) desired to have low dielectric constant. A photomask, hardmask, or opaque resist, patterned so as to define the region(s) to have lower dielectric constant, is used to shield the remainder of the dielectric material from the ultraviolet radiation. Alternatively, a layer of dielectric material can be blanket cured to lower its dielectric constant, then non-critical regions thereof can be selectively over-cured whereby to produce regions of increased mechanical strength.

Abstract: In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures.

Abstract: In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures.

Abstract: A method is provided for integrating a germanium photodetector with a CMOS circuit. The method comprises: forming first and second isolation regions in a silicon substrate; forming a gate electrode in the first isolation region; implanting source/drain extensions in the silicon substrate adjacent to the gate electrode; forming a first sidewall spacer on the gate electrode; implanting source/drain regions in the silicon substrate; removing the first sidewall spacer from the gate electrode; forming a first protective layer over the first and second isolation regions; removing a portion of the first protective layer to form an opening over the second isolation region; forming a semiconductor material comprising germanium in the opening; forming a second protective layer over the first and second isolation regions; selectively removing the first and second protective layers from the first isolation region; and forming contacts to the transistor and to the semiconductor material.

Abstract: A method includes forming a first opening in a top surface of a semiconductor substrate, performing an implant into the top surface to form a doped region, epitaxially growing a semiconductor layer in the first opening along a bottom of the first opening and along sidewalls of the first opening, wherein the epitaxially growing comprises in-situ doping the semiconductor layer, filling the first opening with a dielectric material, forming a second opening in the dielectric material, wherein a bottom of the second opening exposes the epitaxially grown semiconductor layer and sidewalls of the second opening expose the dielectric material; and filling the second opening with a semiconductor material, wherein the semiconductor material comprises a top electrode and a bottom electrode. The bottom electrode is in electrical contact with the semiconductor layer which is in electrical contact with the doped region. The doped region is laterally adjacent the semiconductor material.

Abstract: There is disclosed various embodiments of an implantable anchor for anchoring a medical lead within a patient. The implantable anchor includes a body having at least one lumen for receiving a medical lead, a cam integrated with the body and rotatable to extend into the lumen for engaging the medical lead and inhibiting the movement of the lead with respect to the anchor. The cam may include a handle for facilitating the rotation of the cam. A needle could be connected to the handle to facilitate the securing of the anchor to a portion of the patient.

Abstract: There is a method for forming a semiconductor device. Portions of a sacrificial layer are removed to expose a first seed layer region. The first seed layer region corresponds to a first semiconductor region, and a remaining portion of the sacrificial layer corresponds to a second semiconductor region. An epitaxial semiconductor material is deposited over the first seed layer region. A capping layer is formed to overlie the epitaxial semiconductor material and the remaining portion of the sacrificial layer. Portions of the capping layer are removed to form a capping structure that overlies a part of the remaining portion of the sacrificial layer. Portions of the sacrificial layer not covered by the capping structure are removed to form a sacrificial structure having sidewalls. Fin structures are formed adjoining the sidewalls by depositing a semiconductor material along the sidewalls. Portions of the capping structure are removed to expose portions of sacrificial layer between adjacent fin structures.

Abstract: In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures.

Abstract: A method for forming a semiconductor structure having a transistor region and an optical device region includes forming a transistor in and on a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer, wherein a gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and wherein the transistor is formed in the transistor region of the semiconductor structure. The method also includes forming a waveguide device in the optical device region, wherein forming the waveguide device includes exposing a portion of the second semiconductor layer in the optical device region; and epitaxially growing a third semiconductor layer over the exposed portion of the second semiconductor layer.

Abstract: A semiconductor device is made by steps of removing portions of a first capping layer, removing portions of a sacrificial layer, recessing sidewalls, and forming fin structures. The step of removing portions of the first capping layer forms a first capping structure that covers portions of the sacrificial layer. The step of removing portions of the sacrificial layer removes portions of the sacrificial layer that are not covered by the first capping structure to define an intermediate structure. The step of recessing the sidewalls recesses sidewalls of the intermediate structure relative to edge regions of the first capping structure to form a sacrificial structure having recessed sidewalls. The step of forming fin structures forms fin structures adjacent to the recessed sidewalls.

Abstract: In one embodiment, an apparatus comprises: a base structure adapted to be inserted within the burr hole; a lead securing member for securing the lead, the lead securing member comprising a first arm structure and a second arm structure, at least one spring loaded structure adapted to exert a force to bring the first arm structure and the second arm structure together; and a positioning tool having a distal end adapted to be inserted within the lead securing member. When the positioning tool is positioned within the lead securing member, the distal end holds the first and second arm structures a sufficient distance apart to receive a lead between the first and second arm structures; wherein the positioning tool comprises a control structure at a proximal end that, when engaged, causes the distal end of the positioning tool to be released from between the first and second arm structures.

Abstract: A method for forming a conductive via is discussed and includes forming a seed layer over a first side of a semiconductor substrate, wherein the semiconductor substrate includes a first side opposite a second side, forming a via hole in a semiconductor substrate from the second side of the semiconductor substrate, wherein the via hole exposes the seed layer; and electroplating a conductive via material in the via hole from the seed layer. In one embodiment, a continuous conductive layer is formed over and electrically coupled to the seed layer. The continuous conductive layer can serve as the current source while electroplating the conductive via material.

Abstract: A grease collection system for collecting and storing cooking grease for disposal by a user. The grease collection system includes an inlet assembly being designed for being coupled to a cabinet. The inlet assembly is designed for receiving the cooking grease to be disposed of by the user. A collection assembly is in fluid communication with the inlet assembly whereby the collection assembly is designed for receiving and storing the cooking grease from the inlet assembly to be selectively disposed of by the user. A hose member is fluidly coupled between the inlet assembly and the collection assembly. The hose member provides fluid communication between the inlet assembly and the collection assembly whereby the hose member is designed for permitting the cooking grease to flow from the inlet assembly to the collection assembly when the inlet assembly receives the cooking grease from the user.

Abstract: 3-D ICs (18, 18?, 90) with integrated passive devices (IPDs) (38) having reduced cross-talk and high packing density are provided by stacking separately prefabricated substrates (20, 30, 34) coupled by through-substrate-vias (TSVs) (40). An active device (AD) substrate (20) has contacts on its upper portion (26). An isolator substrate (30) is bonded to the AD substrate (20) so that TSVs (4030) in the isolator substrate (30) are coupled to the contacts (26) on the AD substrate (20), and desirably has an interconnect zone (44) on its upper surface. An IPD substrate (34) is bonded to the isolator substrate (30) so that TSVs (4034) therein are coupled to the interconnect zone (44) on the isolator substrate (30) and/or TSVs (4030) therein. The IPDs (38) are formed on its upper surface and coupled by TSVs (4034, 4030) in the IPD (34) and isolator (30) substrates to devices (26) in the AD substrate (20).

Abstract: A read only memory implemented as a 3D integrated device has a first stratum, a second stratum, and bonded inter-strata connections for coupling the first stratum to the second stratum. The physical bonding between the two strata implements the programming of the read only memory. The stratum may be in wafer form or in die form. The first stratum includes functional active devices and at least one non-programmed active device. The second stratum includes at least conductive routing to be associated with the at least one non-programmed active device. The bonded inter-strata connections include at least one bonded programmable inter-strata connection for programming the at least one non-programmed active device and for providing conductive routing to the programmed active device. The two strata thus form a programmed ROM. Other types of programmable storage devices may be implemented by bonding the two strata.

Abstract: An airflow control system for a blower providing the combustion air for an HVAC system comprises a single phase AC blower motor driving a blower wheel within a blower housing, a vacuum sensor mounted to the housing to sense the vacuum or pressure differential created by the blower as it operates, and a controller that receives as its only feedback signal a variable signal from the vacuum sensor which signal is proportional to the sensed vacuum within the housing and provides an output voltage to the blower motor to adjust the blower motor speed to thereby preferably produce a constant air flow.

Abstract: A method of assembling an electronic device includes testing a first wafer of first die to identify the location of functional first die and dividing the first wafer into a set of panels, wherein a panel includes an M×N array of first die. A panel is bonded to a panel site of a second wafer to form a panel stack wherein a panel site defines an M×N array of second die in the second wafer. The panel stack is sawed into a devices comprising a first die bonded to a second die. Dividing the first wafer into panels may be done according statically or dynamically (to maximize the number of panels having a yield exceeding a specified threshold). Binning of the panels and panel sites according to functional die patterns may be performed to preferentially bond panels to panel sites of the same bin.