Patents by Inventor Robert Edward Galbraith

Robert Edward Galbraith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7979655
    Abstract: A method, computer program product and system for dynamically optimizing the limit and the thresholds of a write cache for a storage adapter connected to storage devices, includes measuring continually an overall locality of data in the write cache for the storage devices, calculating the limit of the write cache dynamically for each storage device using the overall locality and a device-related information, and calculating the threshold of the write cache dynamically for each storage device by combining a fair amount and a device-related additional amount.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: July 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joseph Roger Edwards, Robert Edward Galbraith, Adrian Cuenin Gerhard, Timothy James Larson, William Joseph Maitland, Jr.
  • Patent number: 7925837
    Abstract: A method, computer program product and computer system for maintaining write cache and parity update footprint coherency in a multiple storage adaptor configuration for storage adaptors in a storage subsystem, which includes providing atomic updating of the storage adaptors and the attached disk drives, enabling runtime addition and runtime subtraction of a storage adaptor in the multiple storage adaptor configuration, and maintaining write cache and parity update footprint coherency using atomic updating, runtime addition and runtime subtraction of a storage adaptor.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joseph Roger Edwards, Robert Edward Galbraith, Adrian Cuenin Gerhard, Timothy James Larson, William Joseph Maitland, Jr.
  • Patent number: 7779335
    Abstract: When parity checking in a disk array such as a RAID-6 system determines data and parity information is unsynchronized, additional calculations are performed to determine whether the error may be attributed to faulty data on a disk drive or to a more systemic problem such as a faulty controller. In particular, for each particular error detected, the parity generating information is analyzed to determine if each error involves a common disk index. If so, the data can be corrected on that disk; if not other corrective procedures are implemented.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Patent number: 7669107
    Abstract: In a disk array environment such as a Redundant Array of Independent Disks-6 (RAID-6) environment, the overall performance overhead associated with exposed mode operations such as resynchronization, rebuild and exposed mode read operations is reduced through increased parallelism. By selecting only subsets of the possible disks required to solve a parity stripe equation for a particular parity stripe, accesses to one or more disks in a disk array may be omitted, thus freeing the omitted disks to perform other disk accesses. In addition, disk accesses associated with different parity stripes may be overlapped such that the retrieval of data necessary for restoring data for one parity stripe is performed concurrently with the storage of restored data for another parity stripe.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Publication number: 20090228646
    Abstract: A method, computer program product and computer system for maintaining write cache and parity update footprint coherency in a multiple storage adaptor configuration for storage adaptors in a storage subsystem, which includes providing atomic updating of the storage adaptors and the attached disk drives, enabling runtime addition and runtime subtraction of a storage adaptor in the multiple storage adaptor configuration, and maintaining write cache and parity update footprint coherency using atomic updating, runtime addition and runtime subtraction of a storage adaptor.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Inventors: Joseph Roger Edwards, Robert Edward Galbraith, Adrian Cuenin Gerhard, Timothy James Larson, William Joseph Maitland, JR.
  • Publication number: 20090228660
    Abstract: A method, computer program product and system for dynamically optimizing the limit and the thresholds of a write cache for a storage adapter connected to storage devices, includes measuring continually an overall locality of data in the write cache for the storage devices, calculating the limit of the write cache dynamically for each storage device using the overall locality and a device-related information, and calculating the threshold of the write cache dynamically for each storage device by combining a fair amount and a device-related additional amount.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Inventors: Joseph Roger Edwards, Robert Edward Galbraith, Adrian Cuenin Gerhard, Timothy James Larson, William Joseph Maitland, JR.
  • Patent number: 7493370
    Abstract: A method and apparatus are provided for dynamically determining a primary adapter in a heterogeneous N-way adapter configuration. Each of the adapters generates information about itself and exchanges the information with all other adapters. First a decision-making adapter is identified. Then the decision-making adapter compares the adapter-generated information of all the adapters and makes a decision determining the primary adapter. The decision-making adapter communicates the decision to all other adapters. The determined primary adapter assumes a role as the primary adapter and the other adapters assume a role as a secondary adapter.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: February 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: Brian Eric Bakke, Robert Edward Galbraith, Brian James King, Timothy James Larson, William Joseph Maitland, Jr., Timothy Jerry Schimke
  • Patent number: 7487394
    Abstract: Data associated with the state of a parity update operation in a disk array system such as a RAID-6 system is stored during performance of the operation so that, in the event the operation is interrupted, recovery may be initiated using the stored data. The stored data may include a state indicator that is indicative of the status of the parity update operation, and snapshot data (e.g., a delta value indicative of a difference between new and old data) captured during the parity update operation.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Publication number: 20080243743
    Abstract: A method and apparatus are provided for dynamically determining a primary adapter in a heterogeneous N-way adapter configuration. Each of the adapters generates information about itself and exchanges the information with all other adapters. First a decision-making adapter is identified. Then the decision-making adapter compares the adapter-generated information of all the adapters and makes a decision determining the primary adapter. The decision-making adapter communicates the decision to all other adapters. The determined primary adapter assumes a role as the primary adapter and the other adapters assume a role as a secondary adapter.
    Type: Application
    Filed: June 11, 2008
    Publication date: October 2, 2008
    Applicant: International Business Machines Corporation
    Inventors: Brian Eric Bakke, Robert Edward Galbraith, Brain James King, Timothy James Larson, William Joseph Maitland, Timothy Jerry Schimke
  • Publication number: 20080229148
    Abstract: When parity checking in a disk array such as a RAID-6 system determines data and parity information is unsynchronized, additional calculations are performed to determine whether the error may be attributed to faulty data on a disk drive or to a more systemic problem such as a faulty controller. In particular, for each particular error detected, the parity generating information is analyzed to determine if each error involves a common disk index. If so, the data can be corrected on that disk; if not other corrective procedures are implemented.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Publication number: 20080229155
    Abstract: When parity checking in a disk array such as a RAID-6 system determines data and parity information is unsynchronized, additional calculations are performed to determine whether the error may be attributed to faulty data on a disk drive or to a more systemic problem such as a faulty controller. In particular, for each particular error detected, the parity generating information is analyzed to determine if each error involves a common disk index. If so, the data can be corrected on that disk; if not other corrective procedures are implemented.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Publication number: 20080201608
    Abstract: Data associated with the state of a parity update operation in a disk array system such as a RAID-6 system is stored during performance of the operation so that, in the event the operation is interrupted, recovery may be initiated using the stored data. The stored data may include a state indicator that is indicative of the status of the parity update operation, and snapshot data (e.g., a delta value indicative of a difference between new and old data) captured during the parity update operation.
    Type: Application
    Filed: April 21, 2008
    Publication date: August 21, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Patent number: 7392428
    Abstract: Data associated with the state of a parity update operation in a disk array system such as a RAID-6 system is stored during performance of the operation so that, in the event the operation is interrupted, recovery may be initiated using the stored data. The stored data may include a state indicator that is indicative of the status of the parity update operation, and snapshot data (e.g., a delta value indicative of a difference between new and old data) captured during the parity update operation.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Patent number: 7392458
    Abstract: When parity checking in a disk array such as a RAID-6 system determines data and parity information is unsynchronized, additional calculations are performed to determine whether the error may be attributed to faulty data on a disk drive or to a more systemic problem such as a faulty controller. In particular, for each particular error detected, the parity generating information is analyzed to determine if each error involves a common disk index. If so, the data can be corrected on that disk; if not other corrective procedures are implemented.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Patent number: 7290199
    Abstract: During a parity update of a parity stripe in a disk array, constant values used in finite field arithmetic are algebraically combined in order to reduce the number of buffers and steps needed to update multiple parity values when a change in data occurs. In one implementation, for example, the contents of a buffer that stores the product of a delta value associated with the change in data and a first constant, which is used to update a first parity value, are multiplied by a value representative of the ratio of a second constant, which is used to update a second parity value, and the first constant.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventors: Carl Edward Forhan, Robert Edward Galbraith, Adrian Cuenin Gerhard
  • Patent number: 6877065
    Abstract: A low complexity approach to DASD cache management. Large, fixed-size bands of data from the DASD, rather than variable size records or tracks, are managed, resulting in reduced memory consumption. Statistics are collected for bands of data, as well as conventional LRU information, in order to improve upon the performance of a simple LRU replacement scheme. The statistics take the form of a single counter which is credited (increased) for each read to a band and penalized (reduced) for each write to a band. Statistics and LRU information are also collected for at least half as many nonresident bands as resident bands. In an emulation mode, control information (e.g., statistics and LRU information) regarding potentially cacheable DASD data, is collected even though there is no cache memory installed. When in this mode, the control information permits a real time emulation of performance enhancements that would be achieved were cache memory added to the computer system.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: April 5, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert Edward Galbraith, Carl E. Forhan, Jessica M. Gisi
  • Patent number: 6857045
    Abstract: In a first aspect, a method is provided for updating a compressed cache. The method includes the steps of (1) initiating an update routine for replacing first data stored within the cache with second data, wherein a first section of a compressed data band stored in the cache includes the first data and a second section of the compressed data band includes third data; and (2) in response to initiating the update routine, replacing the first data within the compressed data band with the second data without decompressing the third data. Numerous other aspects are provided.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: February 15, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert Edward Galbraith, Adrian Cuenin Gerhard, Brian James King, William Joseph Maitland, Jr., Timothy Jerry Schimke
  • Patent number: 6728818
    Abstract: An Input/Output (I/O) adapter for use with a second I/O adapter in a clustered configuration. The I/O adapter includes a dedicated communication link, such as a high-speed serial bus, that provides for communication between the I/O adapter and the second I/O adapter. The I/O adapter also includes a message passing circuit, coupled to the dedicated communication link, that allows for transferring of data between the I/O adapter and the second I/O adapter. The I/O adapter further includes a doorbell circuit, coupled to the message passing circuit, that generates interrupts to provide a low level communication between the I/O adapter and the second I/O adapter. A mirroring directory, coupled to the message passing circuit, is also included in the I/O adapter to provide for the mirroring of cache directory writes.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Brian Eric Bakke, Robert Edward Galbraith, Frederic Lawrence Huss, Daniel Frank Moertl, Paul Gary Reuland, Timothy Jerry Schimke
  • Publication number: 20030145172
    Abstract: In a first aspect, a method is provided for updating a compressed cache. The method includes the steps of (1) initiating an update routine for replacing first data stored within the cache with second data, wherein a first section of a compressed data band stored in the cache includes the first data and a second section of the compressed data band includes third data; and (2) in response to initiating the update routine, replacing the first data within the compressed data band with the second data without decompressing the third data. Numerous other aspects are provided.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Applicant: International Business Machines Corporation
    Inventors: Robert Edward Galbraith, Adrian Cuenin Gerhard, Brian James King, William Joseph Maitland, Timothy Jerry Schimke
  • Patent number: 6530003
    Abstract: A method for maintaining data coherency in a dual Input/Output(I/O) adapter having primary and secondary adapters, wherein each of the primary and secondary adapters includes resident write cache data and directory storage devices. The method includes utilizing a split point to separate each of the cache data and directory storage devices into first and second regions, wherein the first regions contain the primary adapter cache data and directory information and the second regions contain the secondary adapter cache data and directory information. Information stored in the primary adapter cache data and directory storage devices is mirrored into the secondary adapter cache data and directory storage devices or, alternatively, information stored in the secondary adapter cache data and directory storage devices is mirrored into the primary adapter cache data and directory storage devices utilizing a dedicated communication link, such as a high-speed serial bus, between the primary and secondary adapters.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brian Eric Bakke, Carl Edward Forhan, Robert Edward Galbraith, Jessica Gisi, Frederic Lawrence Huss, Daniel Frank Moertl, Douglas David Prigge, Paul Gary Reuland, Timothy Jerry Schimke