Abstract: A method for maintaining data coherency in a dual Input/Output(I/O) adapter having primary and secondary adapters, wherein each of the primary and secondary adapters includes resident write cache data and directory storage devices. The method includes utilizing a split point to separate each of the cache data and directory storage devices into first and second regions, wherein the first regions contain the primary adapter cache data and directory information and the second regions contain the secondary adapter cache data and directory information. Information stored in the primary adapter cache data and directory storage devices is mirrored into the secondary adapter cache data and directory storage devices or, alternatively, information stored in the secondary adapter cache data and directory storage devices is mirrored into the primary adapter cache data and directory storage devices utilizing a dedicated communication link, such as a high-speed serial bus, between the primary and secondary adapters.

Abstract: An Input/Output (I/O) adapter for use with a second I/O adapter in a clustered configuration. The I/O adapter includes a dedicated communication link, such as a high-speed serial bus, that provides for communication between the I/O adapter and the second I/O adapter. The I/O adapter also includes a message passing circuit, coupled to the dedicated communication link, that allows for transferring of data between the I/O adapter and the second I/O adapter. The I/O adapter further includes a doorbell circuit, coupled to the message passing circuit, that generates interrupts to provide a low level communication between the I/O adapter and the second I/O adapter. A mirroring directory, coupled to the message passing circuit, is also included in the I/O adapter to provide for the mirroring of cache directory writes.

Abstract: A low complexity approach to DASD cache management. Large, fixed-size bands of data from the DASD, rather than variable size records or tracks, are managed, resulting in reduced memory consumption. Statistics are collected for bands of data, as well as conventional LRU information, in order to improve upon the performance of a simple LRU replacement scheme. The statistics take the form of a single counter which is credited (increased) for each read to a band and penalized (reduced) for each write to a band. Statistics and LRU information are also collected for at least half as many nonresident bands as resident bands. In an emulation mode, control information (e.g., statistics and LRU information) regarding potentially cacheable DASD data, is collected even though there is no cache memory installed. When in this mode, the control information permits a real time emulation of performance enhancements that would be achieved were cache memory added to the computer system.

Abstract: A low complexity approach to DASD cache management. Large, fixed-size bands of data from the DASD, rather than variable size records or tracks, are managed, resulting in reduced memory consumption. Statistics are collected for bands of data, as well as conventional LRU information, in order to improve upon the performance of a simple LRU replacement scheme. The statistics take the form of a single counter which is credited (increased) for each read to a band and penalized (reduced) for each write to a band. Statistics and LRU information are also collected for at least half as many nonresident bands as resident bands. In an emulation mode, control information (e.g., statistics and LRU information) regarding potentially cacheable DASD data, is collected even though there is no cache memory installed. When in this mode, the control information permits a real time emulation of performance enhancements that would be achieved were cache memory added to the computer system.

Abstract: A low complexity approach to DASD cache management. Large, fixed-size bands of data from the DASD, rather than variable size records or tracks, are managed, resulting in reduced memory consumption. Statistics are collected for bands of data, in order to improve upon the performance of a simple LRU replacement scheme. The statistics take the form of a single counter which is credited (increased) for each read to a band and penalized (reduced) for each write to a band. Statistics and LRU information are also collected for at least half as many nonresident bands as resident bands. In an emulation mode, control information (e.g., statistics and LRU information) regarding potentially cacheable DASD data, is collected even though there is no cache memory installed. When in this mode, the control information permits a real time emulation of performance enhancements that would be achieved were cache memory added to the computer system.

Abstract: A computer program is provided. The computer program product includes a medium readable by a computer, the medium (1) having means for inputting a signal representative of a temperature range in which a temperature of an operating environment of a battery resides; and (2) means for estimating a service life of the battery based on the signal. Other means are also provided.

Abstract: An apparatus is provided for estimating the service life of a battery. The apparatus includes a temperature measurement circuit that measures a temperature of an operating environment of the battery and outputs a signal representative of the temperature of the operating environment. A controller coupled to the temperature measurement circuit receives the temperature signal therefrom and estimates the service life of the battery based on the temperature signal. Preferably, the temperature measurement circuit outputs a signal representative of a temperature range in which the measured operating environment temperature resides and the controller estimates the service life of the battery based on the temperature range signal output by the temperature measurement circuit. A method and a computer program product also are provided for similarly estimating the service life of a battery.

Abstract: Data in a write cache is coalesced together prior to each destage operation. This results in higher performance by destaging a large quantity of data from the cache with each destage operation. A root item of data is located, and then a working set of data is collected by identifying additional data in the cache that will be destaged to locations in the storage device adjacent to the root item of data. The root item of data may be identified by starting at the location of the least recently accessed data in the cache, and then selecting a root item of data at a lower storage device address than the least recently accessed data, or may be chosen from a larger than average group of data items that were stored together into the cache. To speed execution, data items are added to a working set by, where possible, scanning an queue of data items kept in access order to locate data items at adjacent storage locations.

Abstract: An apparatus is provided for estimating the service life of a battery. The apparatus includes a temperature measurement circuit that measures a temperature of an operating environment of the battery and outputs a signal representative of the temperature of the operating environment. A controller coupled to the temperature measurement circuit receives the temperature signal therefrom and estimates the service life of the battery based on the temperature signal. Preferably, the temperature measurement circuit outputs a signal representative of a temperature range in which the measured operating environment temperature resides and the controller estimates the service life of the battery based on the temperature range signal output by the temperature measurement circuit. A method and a computer program product also are provided for similarly estimating the service life of a battery.

Abstract: For error recovery purposes, a backup copy of only a portion of the cache directory is maintained in non-volatile storage. Because only a portion of the cache directory is backup copied, a savings in storage space is realized. The partial copy includes an indication of the storage locations on a storage device for which data is in the cache, and an indication of the state of the data, i.e., whether the data is in process of being read from the cache by the processor, is in process of being written to the cache by the processor, is in the process of being destaged from the cache to the storage device, or none of the above. Only certain changes to the state of the cache cause a backup copy of a portion of the cache directory to be saved; other changes to the state of the cache do not cause the portion of the cache directory to be saved in non-volatile storage. This saves processing time by limiting the number of times that data is copied to the cache.