Abstract: According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event.

Abstract: An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by creating a device option read only memory (ROM), or modifying the associated computer basic input-output system (BIOS) to trap software interrupts associated with disk and other media access requests. Associated addresses, such as logical block addresses, can be stored in a log for data that is modified. The resulting log can be stored in a non-volatile medium, including the cache itself. If the available log space is not large enough to record all write activity prior to loading operating system drivers, a flag may be set to indicate the overrun condition.

Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.

Abstract: An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by creating a device option read only memory (ROM), or modifying the associated computer basic input-output system (BIOS) to trap software interrupts associated with disk and other media access requests. Associated addresses, such as logical block addresses, can be stored in a log for data that is modified. The resulting log can be stored in a non-volatile medium, including the cache itself. If the available log space is not large enough to record all write activity prior to loading operating system drivers, a flag may be set to indicate the overrun condition.

Abstract: According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event.

Abstract: A method and system to facilitate paging of one or more segments of a logical-to-physical (LTP) address mapping structure to a non-volatile memory. The LTP address mapping structure is part of an indirection system map associated with the non-volatile memory in one embodiment of the invention. By allowing one or more segments of the LTP address mapping structure to be paged to the non-volatile memory, the amount of volatile memory required to store the LTP address mapping structure is reduced while maintaining the benefits of the LTP address mapping structure in one embodiment of the invention.

Abstract: According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event.

Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.

Abstract: Processor-based systems may use more than one operating system and may have disk drives which are cached. Systems which include a write-back cache and a disk drive may develop incoherent data when operating systems are changed or when disk drives are removed. Scrambling a partition table on a disk drive and storing cache identification information may improve data coherency in a processor-based system.

Abstract: A host controller interface to manage the complexity of accessing mass storage that takes into account the special handling needs of various memory technologies such as polymer memories.

Abstract: An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by creating a device option read only memory (ROM), or modifying the associated computer basic input-output system (BIOS) to trap software interrupts associated with disk and other media access requests. Associated addresses, such as logical block addresses, can be stored in a log for data that is modified. The resulting log can be stored in a non-volatile medium, including the cache itself. If the available log space is not large enough to record all write activity prior to loading operating system drivers, a flag may be set to indicate the overrun condition.

Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.

Abstract: Briefly, in accordance with an embodiment of the invention, a method to generate cache data is provided, wherein the method includes identifying access data transmitted from a storage device during execution of a predetermined software program and generating cache data using the identified access data.

Abstract: In one embodiment of the present invention, a method includes observing disk requests for a drive associated with a memory device; and mapping the memory device based on observing the disk requests.

Abstract: A nonvolatile memory module. The module includes a nonvolatile memory array and a connector allowing the array to make connection with a host system. A memory controller operates to either create an image of a nonvolatile intermediate memory in response to an imaging request or populate a nonvolatile intermediate memory in response to an installation request.

Abstract: A method is described that involves sending a second command over a Serial ATA interface to a device before the device is able to execute a first command that was previously sent to the Serial ATA interface. In a further embodiment of the first command is tagged with a first reference number. In an even further embodiment of the method the second command is tagged with a second reference number.

Abstract: Briefly, in accordance with an embodiment of the invention, a method and system to store cache metadata from a higher latency media in a lower latency media is provided.

Abstract: A system and method for generating a transportable physical level data block trace for a computer system. The method comprises capturing a first physical level data block trace on a first computer system, then performing a reverse file system lookup to generate a logical representation of that trace. That logical representation may be delivered to a second computer system, which may perform a file system lookup to convert the logical representation to a second physical level data block trace for a sequence of disk block accesses resulting from executing an application on the second computer system.

Abstract: An apparatus is equipped with a caching function of a device driver, including a pre-fetch function that selective pre-fetches data stored in disk blocks to facilitate operation with a file system having file clusters with a cluster size greater than an underlying operating system's memory page size. The apparatus is further equipped with a disk block allocation optimization function to generate a new set of disk blocks to reallocate disk blocks for file system clusters accessed by a sequence of file accesses of interest to improve the overall access time for these file system clusters. The disk block allocation optimization function is further equipped to account for the selective pre-fetches and caching to be performed to accommodate said file system.