Abstract: A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the active surface of the power semiconductor chip. A patterned electrically conductive layer is formed adjacent to the second surface of the film, extending through holes in the film to the contact pads.

Abstract: A piezoelectric planar composite apparatus to provide health monitoring of a structure and associated methods are provided. The piezoelectric planar composite apparatus includes a piezoelectric electric material layer, multiple electrodes positioned in electrical contact with the piezoelectric material layer, and multiple sets of electrode interconnect conductors each positioned in electrical contact with a different subset of the electrodes and positioned to form multiple complementary electrode patterns. Each of the complementary electrode patterns is positioned to form an electric field having an electric field axis oriented along a different physical axis from that of an electric field formed by at least one other of the complementary electrode patterns. The interconnect conductors can be distributed over several electrode interconnect conductor carrying layers to enhance formation of the different complementary electrode patterns.

Abstract: A broad band energy harvesting system to harvest energy from a structure and associated methods are provided. The system includes a structure carrying a plurality of environmentally produced vibration frequencies extending over a frequency range and an energy harvesting apparatus positioned in vibration receiving communication with the structure to harvest energy from the structure. Each energy harvesting apparatus includes broadly tuned energy harvesting generators having relatively low quality factor and corresponding relatively wide bandwidth. The energy harvesting generators collectively provide energy harvesting over multiple modes to thereby provide energy harvesting over a substantial portion of the frequency range. Each energy harvesting generator can include a cantilevered beam connected to a common backbone comprised of a resilient material configured to transfer energy between adjacent generators to further enhance energy harvesting.

Abstract: A method of making a solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

Abstract: A broad band energy harvesting system to harvest energy from a structure and associated methods are provided. The system includes a structure carrying a plurality of environmentally produced vibration frequencies extending over a frequency range and an energy harvesting apparatus positioned in vibration receiving communication with the structure to harvest energy from the structure. Each energy harvesting apparatus includes broadly tuned energy harvesting generators having relatively low quality factor and corresponding relatively wide bandwidth. The energy harvesting generators collectively provide energy harvesting over multiple modes to thereby provide energy harvesting over a substantial portion of the frequency range. Each energy harvesting generator can include a cantilevered beam connected to a common backbone comprised of a resilient material configured to transfer energy between adjacent generators to further enhance energy harvesting.

Abstract: An etchant including a halogenated salt, such as Cryolite (Na3AlF6) or potassium tetrafluoro borate (KBF4), is provided. The salt may be present in the etchant in an amount sufficient to etch a substrate and may have a melt temperature of greater than about 200 degrees Celsius. A method of wet etching may include contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the support layer may include aluminum oxide; or contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the etchant may include Cryolite (Na3AlF6), potassium tetrafluoro borate (KBF4), or both; and etching at least a portion of the support layer. The method may provide a laminate produced by growing a crystal onto an aluminum oxide support layer, and chemically removing at least a portion of the support layer by wet etch. An electronic device, optical device or combined device including the laminate is provided.

Abstract: A device includes first and second electrically conductive substrates that are positioned opposite from one another. The device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

Abstract: A solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

Abstract: A refrigeration system is provided. The refrigeration system includes at least one thermal blocking thermotunneling device. The thermal blocking thermotunneling device comprises a first and a second surface separated by a nanoscale gap of less than about 20 nm, such that tunneling of electrons causes a unidirectional transfer of heat from the first surface to the second surface. Further, the at least one thermal blocking thermotunneling device has a thermal back path of less than about 70 percent.

Abstract: The present invention is directed towards a source of ultraviolet energy, wherein the source is a UV-emitting LED's. In an embodiment of the invention, the UV-LED's are characterized by a base layer material including a substrate, a p-doped semiconductor material, a multiple quantum well, a n-doped semiconductor material, upon which base material a p-type metal resides and wherein the base structure has a mesa configuration, which mesa configuration may be rounded on a boundary surface, or which may be non-rounded, such as a mesa having an upper boundary surface that is flat. In other words, the p-type metal resides upon a mesa formed out of the base structure materials. In a more specific embodiment, the UV-LED structure includes n-type metallization layer, passivation layers, and bond pads positioned at appropriate locations of the device. In a more specific embodiment, the p-type metal layer is encapsulated in the encapsulating layer.

Abstract: A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the active surface of the power semiconductor chip. A patterned electrically conductive layer is formed adjacent to the second surface of the film, extending through holes in the film to the contact pads.

Abstract: A piezoelectric planar composite apparatus to provide health monitoring of a structure and associated methods are provided. The piezoelectric planar composite apparatus includes a piezoelectric electric material layer, multiple electrodes positioned in electrical contact with the piezoelectric material layer, and multiple sets of electrode interconnect conductors each positioned in electrical contact with a different subset of the of the electrodes and positioned to form multiple complementary electrode patterns. Each of the complementary electrode patterns is positioned to form an electric field having an electric field axis oriented along a different physical axis from that of an electric field formed by at least one other of the complementary electrode patterns. The interconnect conductors can be distributed over several electrode interconnect conductor carrying layers to enhance formation of the different complementary electrode patterns.

Abstract: A semiconductor chip packaging structure comprising a dielectric film having one or more through holes aligned with the one or more contact pads of at least one power semiconductor chip. A patterned electrically conductive layer adjacent to the dielectric film has one or more electrically conductive posts which extend through the one or more though holes aligned with the contact pads to electrically couple the conductive layer to the contact pads. In certain embodiments, one or more air gaps may be formed between the dielectric film and the active surface of the at least one power semiconductor chip. Methods for fabricating the semiconductor chip packaging structure are also disclosed.

Abstract: The present invention provides an X-ray detector assembly and a fabrication method, where the X-ray detector assembly comprises a scintillator material disposed on a detector matrix array disposed on a detector substrate; an encapsulating coating disposed on the scintillator material; a moisture resistant cover disposed over the detector substrate and the encapsulating coating, and an adhesive material disposed between the detector substrate and the moisture resistant cover so as to form a moisture vapor barrier. The adhesive material is disposed so that it is not in contact with the encapsulating coating. The fabrication method of the X-ray detector assembly includes the steps of disposing the encapsulating coating on the scintillator material and a portion of the detector substrate and removing the encapsulating coating from the portion of the detector substrate.

Abstract: The present invention provides an X-ray detector assembly and a fabrication method, where the X-ray detector assembly comprises a scintillator material disposed on a detector matrix array disposed on a detector substrate; an encapsulating coating disposed on the scintillator material; a moisture resistant cover disposed over the detector substrate and the encapsulating coating, and an adhesive material disposed between the detector substrate and the moisture resistant cover so as to form a moisture vapor barrier. The adhesive material is disposed so that it is not in contact with the encapsulating coating. The fabrication method of the X-ray detector assembly includes the steps of disposing the encapsulating coating on the scintillator material and a portion of the detector substrate and removing the encapsulating coating from the portion of the detector substrate.

Abstract: A switch structure having a base surface; a first high density interconnect (HDI) plastic interconnect layer overlying the base surface layer; a cavity within the HDI plastic interconnect layer; at least one patterned shape memory alloy (SMA) layer overlying the HDI plastic interconnect layer and the cavity, and at least one patterned conductive layer over the at least one patterned SMA layer; a fixed contact pad within the cavity and attached to the base surface and a movable contact pad attached to a portion of the first patterned SMA layer within the cavity such that when the first and second patterned SMA layers and the first and second patterned metallized layers are in a first stable position, the movable contact pad touches the fixed contact pad, thereby providing an electrical connection and forming a closed switch. The structure has a second stable position in which the SMA and metallized layers are flexed away from the cavity so that the contact pads are not in contact and form an open switch.

Abstract: A method for interconnecting high-temperature silicon carbide (SiC) devices enables such high-temperature devices to be used in fabricating electronic circuits of significant scale. This method comprises empirically measuring operational characteristics of a plurality of the devices to be interconnected, the operational characteristics comprising devices which are measured to be non-working and devices which are measured to be working; characterizing the operational characteristics in an operational characteristics map; designing interconnection paths between and among the devices that are characterized to be working by the operational characteristics map; and excluding from the interconnection paths, devices that are characterized to be non-working by the operational characteristics map.

Abstract: The present invention provides an X-ray detector assembly and a fabrication method, where the X-ray detector assembly comprises a scintillator material disposed on a detector matrix array disposed on a detector substrate; an encapsulating coating disposed on the scintillator material; a moisture resistant cover disposed over the detector substrate and the encapsulating coating, and an adhesive material disposed between the detector substrate and the moisture resistant cover so as to form a moisture vapor barrier. The adhesive material is disposed so that it is not in contact with the encapsulating coating. The fabrication method of the X-ray detector assembly includes the steps of disposing the encapsulating coating on the scintillator material and a portion of the detector substrate and removing the encapsulating coating from the portion of the detector substrate.

Abstract: One type of electronic interface structure includes a base; at least one elastomeric island supported by the base; and patterned metallization overlying the at least one elastomeric island and including at least one floating pad at least partially overlying the at least one elastomeric island. Another type of electronic interface structure includes a base; a first dielectric layer overlying the base and having at least one first dielectric layer opening therein; a second dielectric layer overlying the first dielectric layer; and patterned metallization overlying the second dielectric layer and including at least one floating pad at least partially overlying the at least one opening.

Abstract: One type of electronic interface structure includes a base; at least one elastomeric island supported by the base; and patterned metallization overlying the at least one elastomeric island and including at least one floating pad at least partially overlying the at least one elastomeric island. Another type of electronic interface structure includes a base; a first dielectric layer overlying the base and having at least one first dielectric layer opening therein; a second dielectric layer overlying the first dielectric layer; and patterned metallization overlying the second dielectric layer and including at least one floating pad at least partially overlying the at least one opening.