Abstract: A ball grid array device includes a substrate having a first major surface and a second major surface. The first major surface includes leads for electrical connections. The second major surface is devoid of leads. The ball grid array device also includes a first land having a solder mask opening at the first major surface of the substrate, and a second, buried land near the first major surface of the substrate. A method for forming an electronic device includes forming an electronic circuit in a substrate, placing an input pad for an input to the electronic circuit on at least one major surface of the substrate, placing an output pad for an output from the electronic circuit on the at least one major surface of the substrate, and placing an electrically isolated pad near the at least one major surface of the substrate.

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract: A ball grid array device includes a substrate having a first major surface and a second major surface. The first major surface includes leads for electrical connections. The second major surface is devoid of leads. The ball grid array device also includes a first land having a solder mask opening at the first major surface of the substrate, and a second, buried land near the first major surface of the substrate. A method for forming an electronic device includes forming an electronic circuit in a substrate, placing an input pad for an input to the electronic circuit on at least one major surface of the substrate, placing an output pad for an output from the electronic circuit on the at least one major surface of the substrate, and placing an electrically isolated pad near the at least one major surface of the substrate.

Abstract: Embodiments of the invention provide a microelectronic device having a heat spreader positioned between a chip and substrate to which the chip is electrically connected. For one embodiment of the invention, the heat spreader is a thermal slug having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the chip.

Abstract: Logic and memory may be packaged together in a single integrated circuit package that, in some embodiments, has high input/output pin count and low stack height. In some embodiments, the logic may be stacked on top of the memory which may be stacked on a flex substrate. Such a substrate may accommodate a multilayer interconnection system which facilitates high pin count and low package height. In some embodiments, the package may be wired so that the memory may only be accessed through the logic.

Abstract: A device includes a folded flex substrate. A memory die is connected to a first side of the folded flex substrate. A logic die is connected to a second side of the folded flex substrate. A trace routing pattern of source voltage signals is identical to a trace routing pattern of collector voltage signals.

Abstract: In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer and a substrate folded around the interposer. Other embodiments are described and claimed.

Abstract: A flip-chip is mounted on a flex substrate. A flip-chip is mounted on a flex substrate, and a wire-bond chip is mounted on the flip-chip. A packaged flip-chip die is coupled to the flex substrate. A computing system is also disclosed that includes the flip-chip on a flex substrate configuration.

Abstract: A wire-bonding substrate includes in-line wire bonds that are substantially of the same pitch on the die bond pads as on the substrate bond pads. A wire-bonding substrate also includes staggered bond pads on at least one of the die and the substrate. A substrate bond pad includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. A computing system is also disclosed that includes the in-line wire-bonding configuration.

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract: Embodiments of the invention provide a microelectronic device having a heat spreader positioned between a chip and substrate to which the chip is electrically connected. For one embodiment of the invention, the heat spreader is a thermal slug having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the chip.

Abstract: A microelectronic assembly is provided, having redistribution conductors that are formed over a microelectronic die of the assembly instead of through a substrate to which the microelectronic die is mounted. A redistribution conductor is formed by a pair of contacts on the die and a conductive portion connecting the contacts to one another. A wirebonding wire is attached to each contact. One of the wirebonding wires may be used to connect to a terminal on the substrate, a terminal on another die, or to another contact on the same die.

Abstract: Buildup layers may be formed over a flexible substrate. A suitable cavity may be formed in the buildup layers and a silicon die may be positioned over the flexible substrate on a die attach formed within the cavity. As a result, a lower profile flexible substrate package is possible.

Abstract: Some embodiments of the invention effectively shield signal traces on a substrate without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention provide improved power delivery without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention are described in the claims.

Abstract: A ball grid array device includes a substrate having a first major surface and a second major surface. The first major surface includes leads for electrical connections. The second major surface is devoid of leads. The ball grid array device also includes a first land having a solder mask opening at the first major surface of the substrate, and a second, buried land near the first major surface of the substrate. A method for forming an electronic device includes forming an electronic circuit in a substrate, placing an input pad for an input to the electronic circuit on at least one major surface of the substrate, placing an output pad for an output from the electronic circuit on the at least one major surface of the substrate, and placing an electrically isolated pad near the at least one major surface of the substrate.

Abstract: A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The package can include a larger substrate that is coupled to the wire-bonding substrate through an electrical connection such as a solder ball. A process of forming the wire-bonding substrate is also disclosed. The process includes via formation to stop on the wire-bond pad. A method of assembling a microelectronic package is also disclosed that includes coupling the die to the wire-bond pad. A computing system is also disclosed that includes the wire-bonding substrate.