Abstract: A driver circuit for alternately driving a first transistor and a second transistor connected in series includes primary and secondary anti-shoot-through protection. The driver circuit prevents shoot-through at the first and second transistors by using a pair of switch lock-out signals. The switch lock-out signals prevent one transistor from turning on until the other transistor is turned off. The driver circuit eliminates shoot-through in the driver devices driving the first and second transistors by using a pair of driver lock-out signals. The driver devices are turned on only briefly during the transitions of the first and second transistors. Otherwise, the driver devices are turned off. The driver lock-out signals ensure that no contention occurs between the driver devices and furthermore, set up the driver devices for the next On-Off switching sequence. The driver circuit can achieve a fast switching operation as well as improve the efficiency of the power transistors.

Abstract: A compensation circuit for introducing a zero in a first circuit being incorporated in a closed loop feedback system includes a first capacitor, an amplifier and a second capacitor, connected in series between a feedback terminal and an input node of the first circuit. A first resistor is coupled between the feedback terminal and the input node to provide a resistive load to the compensation circuit. The amplifier amplifies the capacitance of the second capacitor to introduce a zero in the first circuit having effectiveness over a wide frequency range. In one embodiment, the compensation circuit is applied to a switching regulator controller for adding an effective zero in the feedback system of a switching regulator for compensating a double-pole introduced by a LC filter circuit in the switching regulator feedback system.

Abstract: A low dropout (LDO) voltage regulator for generating a well-regulated voltage which is stable with variations in load resistance and in supply voltage includes a non-complex reference voltage generator. In the preferred embodiment, the reference voltage generator is configured to function as an amplifier as well as a reference voltage generator. In one embodiment, a single gain stage LDO voltage regulator utilizes the single function reference voltage generator which is compared to a feedback voltage that is proportional to an output voltage. The feedback voltage and the reference voltage control two currents which are used to generate a control signal to a pass transistor. Depending on the supply voltage, the pass transistor either increases or decreases the current to an output terminal to raise or lower the output voltage until the output voltage equals the regulated voltage. In another embodiment, a two gain stage LDO voltage regulator utilizes the dual function reference voltage generator.

Abstract: A temperature monitoring circuit with thermal hysteresis in CMOS circuitry utilizes bipolar transistors which are parasitic to standard CMOS circuitry. A concept of band-gap circuitry is used to provide a proportional to absolute temperature (PTAT) current, which is used as a reference. An output signal is produced above a predetermined temperature by comparing current changes between the PTAT current and a PTAT controlled current in a single current path. The PTAT controlled current decreases faster with temperature increase than the change in the PTAT current. The thermal hysteresis is accomplished by inverting the output signal to control a hysteresis transistor for selectively shorting out a hysteresis resistor. In the preferred embodiment, a start circuit is attached to the temperature monitoring circuit with thermal hysteresis to provide an initial current to activate the present invention. The start circuit is quickly shorted out once the devices of the present invention are turned on.

Abstract: A circuit and method for providing a voltage regulation despite variations in the supply voltage and/or the load utilize a MOS synchronous rectifier in a flyback topology to perform both step-up and step-down operations. The circuit operates in a boost-type operation until the voltage at an output terminal exceeds a predetermined shut-off voltage. At such time, a duty cycle of the circuit is suspended until the voltage at the output terminal falls below the predetermined shut-off voltage. Triggering the duty cycle and the suspension of the duty cycle are dependent solely upon the voltage at the output terminal. The circuit includes a steering device that connects the body of MOS synchronous rectifier to either its source or its drain to consistently configure the MOS synchronous rectifier in a reverse-biased condition. Preferably, the steering device is comprised of two PMOS transistors that are controlled by the voltages at the source and drain of MOS synchronous rectifier.

Abstract: A voltage regulator and method of voltage regulation utilizes an error amplifier and a transconductance amplifier together with a voltage reference, startup circuit and output load. The use of the transconductance amplifier allows the use of an arrangement of two poles and a zero such that the composite gain roll-off has a generally constant slope. One of the poles utilized in this stability scheme is the outer pole formed by the resistive-like load and its filter capacitor. Another pole and zero are generated in the error amplifier circuit. To decouple the noisy input supply voltage, sensitive parts of the circuit are powered by the regulated output voltage. A start circuit is provided to start up the output and voltage reference when no output voltage is present. The transconductance amplifier block has special characteristics which allow it to work to relatively high frequency, above the gain bandwidth product of the control loop. It is driven by a fully differential push-pull, class AB amplifier.

Abstract: A current sense circuit utilizes multiple resistive reference switches connected in electrical series to reduce the level of required reference current (Iref), while maintaining the integrity of tracking current (Iout) through a resistive power switch. Typically, all of the reference switches are MOS transistors connected in electrical series. The first embodiment includes establishing a ratio (n) of series reference transistors to series pilot transistors, n>1. In another embodiment, the series connection of reference switches is in parallel with a single reference resistor and is identical to a series connection of a number (NP) of pilot switches. In a third embodiment, the techniques of the first two embodiments are combined (i.e., n>1 and NP>1). The current sense circuit is utilized to monitor output current through a power switch from a circuit load.

Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.

Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.

Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.

Abstract: A monolithic semiconductor device comprises a VDMOS transistor having first and second main electrodes and a control electrode, and a lateral MOSFET having first and second main electrodes and a control electrode, wherein one of the first and second electrodes of the lateral MOSFET has a lower doping concentration than that of the first and second main electrodes of the VDMOS transistor for forming a Schottky barrier diode.

Abstract: A current sensing circuit includes a first reference resistor connected in series with the source-drain path of a current mirroring transistor across the source-drain path of a power transistor which is N times the size of the current mirroring transistor. Due to the first reference resistor, the current in the mirroring transistor is less than l/N the current in the power transistor. To sense the current in the power transistor more accurately, the current sensing circuitry includes a reference circuit in which the source-drain path of a compensating transistor, of like size as the current mirroring transistor, is connected in parallel with a second reference resistor to produce a reference current which is approximately equal to l/N the current flowing in the power transistor.

Abstract: A process for fabricating a power IC structure which includes the following masking steps:1. CMOS P well mask2. JFET (short-channel implant) mask3. Field oxide growth mask4. Deep P+ mask5. Polysilicon mask6. DMOS P well mask7. n-/n+ mask8. Contact window mask9. Metalization mask10. Overglass mask.

Abstract: A power MOS switching device is provided wherein certain protective circuits in a control portion thereof remain functional when a ground connection to said control portion is lost.

Abstract: A CMOS operational amplifier comprises an input stage for receiving first and second potentials, a bias stage and first and second gain stages. In order to improve the frequency response, capacitors are employed to provide positive feedback. The biasing stage maintains the output in its active region, and avoids the necessity of external biasing.

Abstract: A CMOS memory cell is provided having separate read and write bit lines and coupling devices associated therewith which provide improved read and write times for the cell. The separate read line is coupled to the cell via a bipolar transistor which supplies increased drive current to the read bit line thereby decreasing the read time. The separate write line is coupled to the cell via a low impedance diode which reduces the write time.

Abstract: A safe operating area circuit in combination with a current sensing circuit is coupled to an input voltage line and has a control line input in which the combination provides a current limited output on an output voltage line in response thereto. Break-points may be selectably established in the current limit curve for the output switching device by means coupling the input and output voltage lines.

Abstract: A current sensing circuit is disclosed wherein a small portion of a load current is sampled through a sensing resistor and a substantially larger portion of the load current is allowed to bypass the sensing resistor. A first high current vertical MOS transistor is coupled between the load and the ground terminal. A second vertical MOS transistor is coupled in series between the load and ground terminal. The transistors are constructed in a vertical MOS cellular construction whereby the first transistor comprises on the order of three-thousand cells and the second transistor comprises a single cell. A signal is taken across the sensing resistor and may be provided as feedback to a control means driving the first and second transistors for performing a current limiting or constant current function.

Abstract: An input buffer to which an ECL logic swing is applied through a voltage level shifter to one input of a differential pair of switching devices, the other input of the differential pair being a voltage level shifted by the same amount from an ECL logic reference voltage. The output across a load device coupling one of the switching devices to a collector voltage source drives the input of a conventional inverter coupling a reduced MOS logic voltage supply to the collector voltage source. An output buffer to which a reduced MOS voltage swing logic input is applied to the input of a conventional inverter coupling a reduced MOS logic voltage supply to a collector voltage source. The output of the inverter is applied to one input of a differential pair of switching devices having the other input thereto held at a reference level defined by a voltage divider.

Abstract: A voltage reference source is provided which is temperature stable and can be made by standard CMOS processes. The voltage reference can provide an output voltage which is equal to twice the bandgap voltage. The voltage reference circuit uses a differential amplifier which has an output coupled to an additional amplifying stage. Two substrate bipolar transistors are used wherein the emitter current density of one of the transistors is larger than the emitter current density of the other transistor. An additional transistor is inserted between the output of the amplifying stage and the substrate bipolar transistors thereby providing the output voltage of twice the bandgap voltage.