Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.

Abstract: In accordance with particular embodiments, a method for packaging an incident radiation detector includes depositing an opaque solder resistant material on a first surface of a transparent lid substrate configured to cover at least one detector. The method also includes forming at least one cavity in the lid substrate. The method further includes forming a first portion of at least one hermetic seal ring on the opaque solder resistant material. The first portion of each hermetic seal ring surrounds a perimeter of a corresponding cavity in the lid substrate. The method also includes aligning the first portion of the at least one hermetic seal ring with a second portion of the at least one hermetic seal ring. The method additionally includes bonding the first portion of the at least one hermetic seal ring with the second portion of the at least one hermetic seal ring with solder.

Abstract: Systems and methods for color correcting radiation by alternately focusing a first radiation spectrum on a first radiation spectrum detector, and then focusing at least one additional radiation spectrum on at least one additional radiation spectrum detector.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: Infrared detector elements and methods for forming infrared detector elements in which the top metal layer of CMOS circuitry of the detector element is employed as a lead metal reflector for the infrared detector.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: Systems and methods for solder bonding that employ an equilibrium solidification process in which the solder is solidified by dissolving and alloying metals that raise the melting point temperature of the solder. Two or more structure surfaces may be solder bonded, for example, by employing heating to melt the solder and holding the couple at a temperature above the initial solder melting point of the solder until interdiffusion reduces the volume fraction of liquid so as to form a solid bond between surfaces before cooling to below the initial melting point of the solder.

Abstract: An infrared image detector system mounted on a printed circuit board (PCB) is disclosed for use with an infrared imaging system such as an infrared camera. A semiconductor die having an infrared detector array and connection points on a first surface is mounted to a PCB and electrically coupled to electrical connection points on a PCB. In addition, a heat sink can be coupled to an opposing second surface of the semiconductor die. Still further, the PCB can have a window within which the infrared image detector array can be positioned so that the infrared image detector system can be mounted to one side of the PCB while infrared radiation incident on the second side of the PCB will reach the infrared image detector array through the window.

Abstract: Systems and methods for bonding semiconductor devices and/or multiple wafers, in the form of a first segmented wafer and a second unsegmented wafer which may have different temperature coefficients of expansion (TCE), and which may be bonded together, with or without the presence of a vacuum.

Abstract: Systems and methods for providing multi-spectral image capability using an integrated multi-band focal plane array that, in one example, may be employed to simultaneously image in the visible spectrum and infrared spectrum using an integrated dual-band focal plane array, e.g., by including visible imaging circuitry within read out integrated circuitry (ROIC) used to readout infrared detector elements within the same pixel element/s.

Abstract: Methods for making optically blind reference pixels and systems employing the same. The reference pixels may be configured to be identical to, or substantially identical to, the active detector elements of a focal plane array assembly. The reference pixels may be configured to use the same relatively longer thermal isolation legs as the active detector pixels of the focal plane, thus eliminating joule heating differences. An optically blocking structure may be placed in close proximity directly over the reference pixels.

Abstract: An infrared image detector system mounted on a printed circuit board (PCB) is disclosed for use with an infrared imaging system such as an infrared camera. A semiconductor die having an infrared detector array and connection points on a first surface is mounted to a PCB and electrically coupled to electrical connection points on a PCB. In addition, a heat sink can be coupled to an opposing second surface of the semiconductor die. Still further, the PCB can have a window within which the infrared image detector array can be positioned so that the infrared image detector system can be mounted to one side of the PCB while infrared radiation incident on the second side of the PCB will reach the infrared image detector array through the window.

Abstract: Methods for making optically blind reference pixels and systems employing the same. The reference pixels may be configured to be identical to, or substantially identical to, the active detector elements of a focal plane array assembly. The reference pixels may be configured to use the same relatively longer thermal isolation legs as the active detector pixels of the focal plane, thus eliminating joule heating differences. An optically blocking structure may be placed in close proximity directly over the reference pixels.

Abstract: Infrared detector elements and methods for forming infrared detector elements in which the top metal layer of CMOS circuitry of the detector element is employed as a lead metal reflector for the infrared detector.

Abstract: Systems and methods for bonding semiconductor devices and/or multiple wafers, in the form of a first segmented wafer and a second unsegmented wafer which may have different temperature coefficients of expansion (TCE), and which may be bonded together, with or without the presence of a vacuum.

Abstract: Systems and methods for providing multi-spectral image capability using an integrated multi-band focal plane array that, in one example, may be employed to simultaneously image in the visible spectrum and infrared spectrum using an integrated dual-band focal plane array, e.g., by including visible imaging circuitry within read out integrated circuitry (ROIC) used to readout infrared detector elements within the same pixel element/s.

Abstract: A method for manufacturing optically-transparent lids includes etching sub-wavelength structures on a surface of a lid wafer. The structures may be arrayed in a hexagonally closed-packed pattern.