Abstract: A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.

Abstract: A method for manufacturing optically-transparent lids includes etching sub-wavelength structures on a surface of a lid wafer. The structures may be arrayed in a hexagonally closed-packed pattern.

Abstract: A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.

Abstract: A method for manufacturing optically-transparent lids includes etching sub-wavelength structures on a surface of a lid wafer. The structures may be arrayed in a hexagonally closed-packed pattern.

Abstract: A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.

Abstract: A microbolometer is provided that includes an absorber element having material properties to change temperature in response to absorbing infrared radiation. An amorphous silicon detector is thermally coupled to the absorber element and is suspended above a silicon substrate at a height of one-quarter wavelength of the infrared radiation to be detected. The amorphous silicon detector changes electrical resistance in response to the absorber element changing temperature. The microbolometer also includes electrode arms coupled to the silicon substrate to provide structural support for the amorphous silicon detector above the surface of the silicon substrate. The electrode arms further provide electrical connectivity for the microbolometer.

Abstract: A vacuum package for integrated circuit devices includes a sealing ring having multiple control spacers of uniform thickness distributed around the sealing ring. The sealing ring is in a designated area on a substrate, material and surrounds one or more integrated circuit devices. The vacuum package also includes a sealing layer on the sealing ring. A vacuum package lid is sealed to the sealing ring by the sealing layer on the sealing ring. The vacuum package lid provides a vacuum cell for the one or more integrated circuit devices.

Abstract: A method for vacuum packaging MEMS or similar devices during device fabrication comprises forming a plurality of MEMS devices (12), or similar devices, on a device wafer (10). A device sealing ring (16) is formed between the MEMS devices (12) and bonding pads (14) connected to a MEMS device. A solder adhesion layer (24) forms part of the device sealing ring (16) surrounding each MEMS or similar device (12). A lid wafer (30) is formed having a plurality of lid sealing rings (32) corresponding in number and location to the device sealing rings (16). Each lid sealing ring (32) surrounds a cavity (34). The device wafer (30) is aligned with the lid wafer (10) to align each device sealing ring (16) with the corresponding lid sealing ring (32), leaving a gap between the lid wafer (30) and the device wafer (10). The resulting assembly (50) is placed in a vacuum furnace.

Abstract: A method for vacuum packaging MEMS devices is provided that comprises forming a plurality of MEMS devices (12) on a device wafer (10). A first sealing ring (16) is formed surrounding one of the MEMS devices (12) and any associated mating pads (70). A plurality of integrated circuit devices (80) is formed on a lid wafer (30) where each integrated circuit device (80) has one or more associated mating pads (82) and one or more associated bonding pads (86). A plurality of second sealing rings (32) is formed on the lid wafer (30) where each of the second sealing rings (32) surrounds one of the integrated circuit devices (80) and any associated bonding pads (82). The second sealing ring (32) is positioned between the perimeter of the integrated circuit device (80) and the associated bonding pads (86). A sealing layer is formed on either each first sealing ring (16) or each second sealing ring (32).

Abstract: An array of bolometers suspended over a substrate by support arms located beneath the corresponding bolometer to allow maximum fill factor in the array.

Abstract: A method for vacuum packaging MEMS or similar devices during device fabrication comprises forming a plurality of MEMS devices (12), or similar devices, on a device wafer (10). A device sealing ring (16) is formed between the MEMS devices (12) and bonding pads (14) connected to a MEMS device. A solder adhesion layer (24) forms part of the device sealing ring (16) surrounding each MEMS or similar device (12). A lid wafer (30) is formed having a plurality of lid sealing rings (32) corresponding in number and location to the device sealing rings (16). Each lid sealing ring (32) surrounds a cavity (34). The device wafer (30) is aligned with the lid wafer (10) to align each device sealing ring (16) with the corresponding lid sealing ring (32), leaving a gap between the lid wafer (30) and the device wafer (10). The resulting assembly (50) is placed in a vacuum furnace.

Abstract: An infrared radiation emitter is provided that is capable of producing infrared radiation modulating at high frequency. The IR emitter includes a low-thermal-mass resistive membrane that is suspended by long thermal isolation arms over a substrate. The membrane is suspended over the substrate such that a resonant emitting cavity is formed between the membrane and the substrate. The low-mass, thermally isolated membrane design maximizes the temperature change induced by Joule heating of the resistive membrane and allows the emitted IR radiation to be modulated at high frequencies.

Abstract: An apparatus (2) is provided for producing electrical stimulation to at least one person (10a, 10b) in response to a varying output audio signal (4). The apparatus (2) includes a first circuit (13) which receives the varying output audio signal (4). A second circuit (20), coupled to the first circuit (13), generates a plurality of electrical pulses which vary in response to the varying output audio signal (4). A node (8a, 8b) is coupled to the second circuit (20). The node (8a, 8b) conducts the electrical pulses in order to provide a pleasing variable stimulus to the person (10a, 10b) when the person (10a, 10b) contacts the node (8a, 8b).

Abstract: Bolometer array with active bolometers suspended over a substrate and a periphery of dummy bolometers making contact with the substrate, this allows bolometer formation under stress conditions.

Abstract: A support arm for a bolometer suspended over a substrate contacts the underlying substrate in the form of a triangular wedge. The support arm may be a dielectric coated silicon with a metal conductor on the support arm and extending to a contact pad on the substrate.

Abstract: A preferred embodiment of this invention is a hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, congelated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g AI 17).

Abstract: A hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, correlated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g A1 17).

Abstract: A method of mounting a semiconductor device and making electrical connections without the use of bond wires is disclosed. In preferred form this process also includes fabrication of an IR detector array. Mesas in the mirror image of a desired array pattern are formed on the surface of a bar of IR sensitive material by etching to a depth greater than the desired final detector array thickness. A lead pattern for the desired detector array is formed on a support member with contact pads plated to a thickness greater than the final detector thickness. The bar of detector material is turned over and the etched surface bonded to the support member by means of an adhesive which also fills the area between the lead pattern contact pads and contact areas of the detector, to form a semiconductor unit. The semiconductor unit is lapped to final detector thickness to form a coplanar surface of the lead pattern contact pads, detector contact areas, and the adhesive material.