Abstract: A semiconductor device includes a semiconductor substrate having a first side, at least a first area formed in the semiconductor substrate, at least a second area formed in the semiconductor substrate, a first metal layer structure having at least a first metal portion in the first area and at least a second metal portion in the second area, and a second metal layer structure on and in ohmic contact with the first metal portion in the first area while leaving the second metal portion of the first metal layer structure in the second area uncovered. The second metal layer structure and the first metal portion of the first metal layer structure form together a common metallization structure on the first side of the semiconductor substrate in the first area.

Abstract: A semiconductor device includes a semiconductor substrate having a first side, at least a first area formed in the semiconductor substrate, at least a second area formed in the semiconductor substrate, a first metal layer structure having at least a first metal portion in the first area and at least a second metal portion in the second area, and a second metal layer structure on and in ohmic contact with the first metal portion in the first area while leaving the second metal portion of the first metal layer structure in the second area uncovered. The second metal layer structure and the first metal portion of the first metal layer structure form together a common metallization structure on the first side of the semiconductor substrate in the first area.

Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having a first area and a second area. A first metal layer structure is formed which includes at least a first metal portion in the first area and a second metal portion in the second area. A plating mask is formed on the first metal layer structure to cover the second metal portion, and a second metal layer structure is plated on and in ohmic contact with the first metal portion of the first metal layer structure.

Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having a first area and a second area. A first metal layer structure is formed which includes at least a first metal portion in the first area and a second metal portion in the second area. A plating mask is formed on the first metal layer structure to cover the second metal portion, and a second metal layer structure is plated on and in ohmic contact with the first metal portion of the first metal layer structure.

Abstract: The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at least one surface zone of the metallic surface in which the metallic surface is to be electrically conductive bonded to a contact conductor. To fabricate the bond, a portion of a provided contact conductor above the surface zone is pressed on to the protective layer and the body so that the protective layer is destroyed above the surface zone in achieving an electrically conductive bond between the metallic surface and the contact conductor.

Abstract: A bonding connection between a bonding wire and a power semiconductor chip is disclosed. The power semiconductor chip has a semiconductor body arranged in which is an active cell region with a multiplicity of cells arranged one following the other in a lateral direction and connected electrically in parallel. The semiconductor body has a surface portion arranged above the active cell region in a vertical direction perpendicular to the lateral direction. Applied to the surface portion is a metallization layer onto which a bonding wire is bonded. The bonding wire comprises an alloy containing at least 99% by weight aluminum and at least one further alloying constituent. The aluminum has a grain structure with a mean grain size which is less than 2 ?m.

Abstract: A bonding connection between a bonding wire and a power semiconductor chip is disclosed. The power semiconductor chip has a semiconductor body arranged in which is an active cell region with a multiplicity of cells arranged one following the other in a lateral direction and connected electrically in parallel. The semiconductor body has a surface portion arranged above the active cell region in a vertical direction perpendicular to the lateral direction. Applied to the surface portion is a metallization layer onto which a bonding wire is bonded. The bonding wire comprises an alloy containing at least 99% by weight aluminium and at least one further alloying constituent. The aluminum has a grain structure with a mean grain size which is less than 2 ?m.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract: The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at least one surface zone of the metallic surface in which the metallic surface is to be electrically conductive bonded to a contact conductor. To fabricate the bond, a portion of a provided contact conductor above the surface zone is pressed on to the protective layer and the body so that the protective layer is destroyed above the surface zone in achieving an electrically conductive bond between the metallic surface and the contact conductor.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.