Patents by Inventor Ronald G. Polcawich

Ronald G. Polcawich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11387802
    Abstract: A hybrid ferroelectric/non-ferroelectric piezoelectric microresonator is disclosed. The hybrid microresonator uses a ferroelectric layer as the actuator as ferroelectric materials typically have higher actuation coefficients than non-ferroelectric piezoelectric materials. The hybrid microresonator uses a non-ferroelectric piezoelectric layer as the sensor layer as non-ferroelectric piezoelectric materials typically have higher sensing coefficients than ferroelectric materials. This hybrid microresonator design allows the independent optimization of actuator and sensor materials. This hybrid microresonator design may be used for bulk acoustic wave contour mode resonators, bulk acoustic wave solidly mounted resonators, free-standing bulk acoustic resonators, and piezoelectric transformers.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: July 12, 2022
    Assignees: National Technology & Engineering Solutions of Sandia, LLC, The United States of America as Represented by the Secretary of the Army
    Inventors: Benjamin Griffin, Christopher Nordquist, Ronald G. Polcawich
  • Publication number: 20200224312
    Abstract: A method of depositing a thin film of lead titanate (PTO), lead zirconate (PZO) or lead zirconate titanate (PZT) comprising depositing a PTO, PZO or PZT layer upon a substrate whereby growth occurs primarily due to self-limited surface chemisorption of pulsed chemical vapor, and annealing the PTO, PZO, or PZT layer and substrate.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 16, 2020
    Inventors: Nicholas A. Strnad, Daniel M. Potrepka, Ronald G. Polcawich
  • Patent number: 10266936
    Abstract: A method of making a piezoelectric device comprising providing a deposition chamber, the deposition chamber having reduced pressure therein; loading a substrate into the deposition chamber; sputter depositing hexagonal 001 oriented titanium on the substrate; providing an oxygen anneal to convert 001 oriented titanium into 100 oriented rutile TiO2; sputter depositing a 111 or 100 oriented textured conducting material for use as an electrode; sputter depositing a hexagonal 001 oriented titanium and providing an oxygen anneal in a lead oxide environment to convert 001 oriented titanium into 100 oriented rutile TiO2 or PbxTi1-xO3; sputter depositing textured lead zirconate titanate PbZrxTi1-xO3 having an 001 orientation as a piezoelectric layer, and sputter depositing a textured electrode on top of the textured lead zirconate titanate; whereby processing of the layers within the deposition chamber provides minimized exposure to ambient contamination and improved texturing in the resulting films.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: April 23, 2019
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Daniel M. Potrepka, James R. Mulcahy, Ronald G. Polcawich
  • Patent number: 10043565
    Abstract: A ferroelectric mechanical memory structure comprising a substrate, a MEMS switch element movable between a first position and at least one second position, the MEMS switch element comprising first and second electrodes, a layer of ferroelectric material positioned between the first and second electrodes so that upon application of voltage between the first and second electrodes the MEMS switch element moves between the first position and the second position, and a switch contact which contacts the first electrode only when the MEMS switch element is in the first position, wherein the ferroelectric material is selected so that the remanent strain within the layer of ferroelectric material is controlled by the history of the voltage potential applied to the ferroelectric material by the first and second electrodes, and wherein the remanent strain is sufficient to retain the MEMS switch element in the first or second position upon removal of the voltage.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: August 7, 2018
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Glen Richard Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Patent number: 9887205
    Abstract: A method of making a memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: February 6, 2018
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Glen R Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Patent number: 9761785
    Abstract: A ferroelectric device comprising a substrate; a textured layer; a first electrode comprising a thin layer of metallic material having a crystal lattice structure divided into granular regions; a seed layer; the seed layer being epitaxially deposited so as to form a column-like structure on top of the granular regions of the first electrode; at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the seed layer; the ferroelectric material layer, the seed layer, and first electrode each having granular regions in which column-like structures produce a high degree of polarization normal to the growth plane and a method of making.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: September 12, 2017
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Glen R Fox, Ronald G. Polcawich, Daniel M Potrepka, Luz M Sanchez
  • Patent number: 9573856
    Abstract: A micro-explosive material is provided. The micro-explosive material can include a carbon nanotube and a solid oxidizer attached to the carbon nanotube. The carbon nanotube with the solid oxidizer attached thereto is operable to burn per an exothermic chemical reaction between the carbon nanotube and the solid oxidizer such that a controlled burn and/or an explosive burn is provided. The micro-explosive material can be used as a heat generator, a gas generator, a micro-thruster, a primer for use with a larger explosive material, and the like.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: February 21, 2017
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Luke M. Currano, Madan Dubey, Ronald G. Polcawich
  • Publication number: 20160315090
    Abstract: A method of making a memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.
    Type: Application
    Filed: July 1, 2016
    Publication date: October 27, 2016
    Inventors: GLEN R. Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Publication number: 20160276014
    Abstract: A ferroelectric mechanical memory structure comprising a substrate, a MEMS switch element movable between a first position and at least one second position, the MEMS switch element comprising first and second electrodes, a layer of ferroelectric material positioned between the first and second electrodes so that upon application of voltage between the first and second electrodes the MEMS switch element moves between the first position and the second position, and a switch contact which contacts the first electrode only when the MEMS switch element is in the first position, wherein the ferroelectric material is selected so that the remanent strain within the layer of ferroelectric material is controlled by the history of the voltage potential applied to the ferroelectric material by the first and second electrodes, and wherein the remanent strain is sufficient to retain the MEMS switch element in the first or second position upon removal of the voltage.
    Type: Application
    Filed: April 18, 2016
    Publication date: September 22, 2016
    Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I
    Inventors: Glen Richard Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Publication number: 20160254439
    Abstract: A method of making a piezoelectric device comprising providing a deposition chamber, the deposition chamber having reduced pressure therein; loading a substrate into the deposition chamber; sputter depositing hexagonal 001 oriented titanium on the substrate; providing an oxygen anneal to convert 001 oriented titanium into 100 oriented rutile TiO2; sputter depositing a 111 or 100 oriented textured conducting material for use as an electrode; sputter depositing a hexagonal 001 oriented titanium and providing an oxygen anneal in a lead oxide environment to convert 001 oriented titanium into 100 oriented rutile TiO2 or PbxTi1-xO3; sputter depositing textured lead zirconate titanate PbZrxTi1-x03 having an 001 orientation as a piezoelectric layer, and sputter depositing a textured electrode on top of the textured lead zirconate titanate; whereby processing of the layers within the deposition chamber provides minimized exposure to ambient contamination and improved texturing in the resulting films.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 1, 2016
    Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I
    Inventors: Daniel M. Potrepka, James R. Mulcahy, Ronald G. Polcawich
  • Patent number: 9385306
    Abstract: A memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: July 5, 2016
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Glen R Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Patent number: 9252704
    Abstract: A voltage controlled oscillator comprising a substrate and a bilayer graphene transistor formed on the substrate. The transistor has two signal terminals and a gate terminal positioned in between the signal terminals. A voltage controlled PZT or MEMS capacitor is also formed on the substrate. The capacitor is electrically connected to the transistor gate terminal. At least one component is connected to the transistor and capacitor to form a resonant circuit.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: February 2, 2016
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Osama M. Nayfeh, Stephen James Kilpatrick, James Wilson, Madam Dubey, Ronald G. Polcawich
  • Publication number: 20150263268
    Abstract: A memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 17, 2015
    Inventors: Glen R Fox, Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Patent number: 9096426
    Abstract: A physical structure and a method for forming a electronic devices on a substrate comprising: providing a substrate; forming a plurality of layers on the substrate, the layers comprising at least two layers of conducting material and a layer of insulating material therebetween; depositing photoresist material onto predetermined regions of the plurality of layers, the photoresist material varying in thickness; utilizing gray scale illumination on the photoresist material; removing a portion of the layers using physical etching to expose predetermined portions of the conducting layers. Optionally, the photoresist may be utilized on a plurality of discrete electronic devices concurrently, such that the gray scale illumination is conducted on a plurality of discrete electronic devices concurrently. Similarly, the physical etching may be conducted on the discrete electronic devices concurrently; removing different thicknesses of material concurrently. Also claimed is a product made by the claimed method.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: August 4, 2015
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Gabriel I. Smith, Brendan Hanrahan, Christopher M Waits, Ronald G Polcawich, Luz Sanchez, Sarah Salah Bedair
  • Patent number: 8966993
    Abstract: Method and apparatus for a piezoelectric apparatus are provided. In some embodiments, a method for fabricating a piezoelectric device may include etching a series of vertical trenches in a top substrate portion, depositing a first continuous conductive layer over the trenches and substrate, depositing a continuous piezoelectric layer over the first continuous conductive layer such that the piezoelectric material has trenches and sidewalls, depositing a second continuous conductive layer over the continuous piezoelectric layer, etching through the vertical trenches of the first continuous conductive layer, continuous piezoelectric layer, second continuous conductive layer, and top substrate portion into a bottom substrate portion, etching a series of horizontal trenches in the bottom substrate portion such that the horizontal trenches and vertical trenches occupy a continuous free space and allow movement of a piezoelectric MEMS device created by the above method in three dimensions.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 3, 2015
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Jeffrey S. Pulskamp, Ronald G. Polcawich
  • Patent number: 8872595
    Abstract: A binary bi-phase shift modulator having an input piezoelectric transducer and an output piezoelectric transducer connected in series between a radio frequency input and a radio frequency output. A fixed DC pole voltage having a first polarity is connected to one of the transducers. A DC switched pole voltage is connected to the other transducer which switches between the pole voltage of the first polarity and a pole voltage of the opposite polarity in accordance with a binary data signal. The polarity of the radio frequency input relative to the radio frequency output varies as a function of the polarity of the DC switched pole voltage.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: October 28, 2014
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Roger D. Kaul, Jeffrey S. Pulskamp, Ronald G. Polcawich, Sarah Bedair
  • Patent number: 8866367
    Abstract: A method for forming an electrical device having a {100}-textured platinum electrode comprising: depositing a textured metal thin film onto a substrate; thermally oxidizing the metal thin film by annealing to convert it to a rocksalt structure oxide with a {100}-texture; depositing a platinum film layer; depositing a ferroelectric film. An electrical device comprising a substrate; a textured layer formed on the substrate comprising metal oxide having a rocksalt structure; a first electrode film layer having a crystallographic texture acting as a template; and at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the first electrode film layer whereby the rocksalt structure of the textured layer facilitates the growth of the first electrode film layer with a {100} orientation which forms a template for the epitaxial deposition of the ferroelectric layer such that the ferroelectric layer is formed with an {001} orientation.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: October 21, 2014
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Glen R. Fox, Ronald G. Polcawich, Daniel M. Potrepka
  • Publication number: 20140299967
    Abstract: A physical structure and a method for forming a electronic devices on a substrate comprising: providing a substrate; forming a plurality of layers on the substrate, the layers comprising at least two layers of conducting material and a layer of insulating material therebetween; depositing photoresist material onto predetermined regions of the plurality of layers, the photoresist material varying in thickness; utilizing gray scale illumination on the photoresist material; removing a portion of the layers using physical etching to expose predetermined portions of the conducting layers. Optionally, the photoresist may be utilized on a plurality of discrete electronic devices concurrently, such that the gray scale illumination is conducted on a plurality of discrete electronic devices concurrently. Similarly, the physical etching may be conducted on the discrete electronic devices concurrently; removing different thicknesses of material concurrently. Also claimed is a product made by the claimed method.
    Type: Application
    Filed: April 5, 2013
    Publication date: October 9, 2014
    Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I
    Inventors: GABRIEL l. Smith, BRENDAN HANRAHAN, CHRISTOPHER M. WAITS, RONALD G. POLCAWICH, LUZ SANCHEZ, SARAH SALAH BEDAIR
  • Publication number: 20140265734
    Abstract: A ferroelectric device comprising a substrate; a textured layer; a first electrode comprising a thin layer of metallic material having a crystal lattice structure divided into granular regions; a seed layer; the seed layer being epitaxially deposited so as to form a column-like structure on top of the granular regions of the first electrode; at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the seed layer; the ferroelectric material layer, the seed layer, and first electrode each having granular regions in which column-like structures produce a high degree of polarization normal to the growth plane and a method of making.
    Type: Application
    Filed: March 19, 2014
    Publication date: September 18, 2014
    Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I
    Inventors: Glen R. Fox, Ronald G. Polcawich, Daniel M. Potrepka, Luz M. Sanchez
  • Publication number: 20140216288
    Abstract: Embodiments of energetic devices are provided herein. In some embodiments, an energetic device may include a substrate having a plurality of pores formed in a portion of the substrate; a plurality of carbon nanotubes disposed proximate the plurality of pores such that a reaction within one of the plurality of pores or the plurality of carbon nanotubes initiates a reaction within the other of the plurality of pores or the plurality of carbon nanotubes; a solid oxidizer disposed in the plurality of pores and the carbon nanotubes; and an initiator to initiate a reaction within one of the plurality of pores or the plurality of carbon nanotubes.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: U.S. Army Research Laboratory ATTN: RDRL-LOC-I
    Inventors: Luke Currano, Madan Dubey, Ronald G. Polcawich