Patents by Inventor Rotem Sela

Rotem Sela has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10534709
    Abstract: A data storage device includes a write cache, a non-volatile memory and a controller coupled to the write cache and to the non-volatile memory. The controller is configured to, responsive to receiving a plurality of flush commands, write all data from the write cache to the non-volatile memory while executing fewer than all of the plurality of flush commands.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: January 14, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: Hadas Oshinsky, Rotem Sela, Amir Shaharabany
  • Publication number: 20200014544
    Abstract: An apparatus includes a Replay Protected Memory Block (RPMB) formed in a plurality of non-volatile memory cells. Control circuitry is configured to authenticate access to the RPMB with a plurality of keys. Authentication of write access to the RPMB is through a write key and authentication of read access to the RPMB is through a read key.
    Type: Application
    Filed: February 4, 2019
    Publication date: January 9, 2020
    Applicant: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Miki Sapir
  • Publication number: 20200004671
    Abstract: Technology is disclosed for dynamically assigning apps to non-volatile memory based on monitoring the apps' usage of memory resources. For a memory system having a high endurance section, such as binary (or single level cell, SLC) memory, and a lower endurance section, such as multi-level cell (MLC) memory, an app, including both the code for executing the app and the associated data payload, may initially be stored in the lower endurance section. The memory system monitors the activity of the app for high levels of activity and, if the app is being frequently written, the memory system notifies the host. In response, the host can request the memory system to move the app or just its associated payload to the high endurance section.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Applicant: Western Digital Technologies, Inc.
    Inventors: Nadav Neufeld, Mei Yi Madeline Ng, Enosh Levi, Rotem Sela
  • Patent number: 10521617
    Abstract: Technology that provides security for a requestor of data stored in a non-volatile memory device is disclosed. In one aspect, the non-volatile memory device provides data on a host interface only if a digest for the data matches an expected digest for the data. The non-volatile memory device may store expected digests for data for various logical addresses. Upon receiving a request on the host interface to read data for a logical address, the non-volatile memory device may access the data for the logical address, compute a digest for the accessed data, and compare the computed digest with the expected digest. The non-volatile memory device provides the accessed data on the host interface only if the computed digest matches the expected digest, in one aspect. The non-volatile memory device may be used to provide a secure boot of a host.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: December 31, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Enosh Levi
  • Publication number: 20190391761
    Abstract: A method of sending a command from a slave storage device to a master host includes receiving an initial command from the master host. A callback response containing a requested command triggered by the initial command is sent by the slave storage device. In one embodiment, the master host is a Universal Flash Storage (UFS) host and the slave storage device is a UFS storage device. In one embodiment, the initial command is a start stop unit (SSU) command with a power condition field of sleep or powerdown and the requested command is a read buffer command. In another embodiment, the initial command is a start stop unit (SSU) command with a power condition field of active and the requested command is a write buffer command.
    Type: Application
    Filed: March 29, 2019
    Publication date: December 26, 2019
    Inventors: David C. BRIEF, Rotem SELA, Yoav MARKUS
  • Patent number: 10459803
    Abstract: A controller receives an indication that a memory management table loaded to a random-access storage device is in a corrupted state. The controller retrieves one or more error recovery parameters of a memory unit stored in metadata of a physical block of a plurality of physical blocks of the non-volatile storage device. The controller examines the one or more error recovery parameters to determine whether the one or more error recovery parameters indicate the memory unit is fresh or stale. The controller updates the memory management table with logical-to-physical translation information of the metadata for the memory unit that is determined to be fresh. The controller writes the updated memory management table to the non-volatile storage device.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: October 29, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rotem Sela, Amir Shaharabany, Miki Sapir, Eliad Adi Klein
  • Patent number: 10438664
    Abstract: A non-volatile memory device uses physical authentication to enable the secure programming of a boot partition, when the boot partition is write protected. This physical authentication can also be used to enable other features/functions.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 8, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Miki Sapir, Enosh Levi
  • Patent number: 10430328
    Abstract: Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: October 1, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Rotem Sela, Miki Sapir, Amir Shaharabany, Hadas Oshinsky, Rafi Abraham, Elad Baram
  • Publication number: 20190294333
    Abstract: Apparatuses, systems, and methods are disclosed for log-based storage for different data types in non-volatile memory. An apparatus may include a non-volatile memory element and a controller. A non-volatile memory element may include a first portion of memory, an intermediate storage, and a second portion of memory. A controller may be configured to receive a plurality of data units. A controller may be configured to classify units of data using a first data type and a second data type. A controller may be configured to store a first unit of data having a first data type in a first portion of memory and a second unit of data having a second data type in intermediate storage. Further, a controller may relocate a second unit of data to a second portion of memory.
    Type: Application
    Filed: March 22, 2018
    Publication date: September 26, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: MIKHAEL ZAIDMAN, EYAL ITTAH, ROTEM SELA, AMIR SHAHARABANY
  • Patent number: 10372341
    Abstract: A controller addresses portions of non-volatile memory via a memory interface using physical addresses and addresses portions of host data via the host interface using logical addresses. The controller maintains logical to physical mappings and physical to logical mappings for the logical addresses and the physical addresses. The controller is configured to move data from a source logical address to a destination logical address by updating logical to physical mappings and physical address to logical mappings without instructing the non-volatile memory to move the data between physical locations. In one embodiment, this process is used to implement a command to move or defragment data.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: August 6, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Hadas Oshinsky, Rotem Sela, Amir Shaharabany
  • Publication number: 20190220200
    Abstract: A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to provide a logical exported capacity of the memory to a host, wherein the logical exported capacity is greater than an actual storage capacity of the memory; receive a command from the host to write data to a logical address; determine whether there is available actual storage capacity in the memory to write the data; and write the data to a physical address in memory that corresponds to the logical address only if it is determined that there is available actual storage capacity in the memory to write the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Application
    Filed: March 26, 2019
    Publication date: July 18, 2019
    Inventors: Amir SHAHARABANY, Michael ZAIDMAN, Rotem SELA, Hadas OSHINSKY
  • Patent number: 10289552
    Abstract: A storage system and method are provided for flush optimization. In one embodiment, a storage system is provided comprising a cache, a non-volatile memory, and a controller. The controller is configured to: store, in the cache, data received from a host and to be written in the non-volatile memory; receive a command from the host to move the data stored in the cache into the non-volatile memory; without having executed the command, send a confirmation to the host that the command was executed; and execute the command after sending the continuation to the host.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: May 14, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Tal Heller, Hadas Oshinsky, Rotem Sela, Einav Zilberstein, Amir Shaharabany, Yigal Eli
  • Patent number: 10282097
    Abstract: A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to provide a logical exported capacity of the memory to a host, wherein the logical exported capacity is greater than an actual storage capacity of the memory; receive a command from the host to write data to a logical address; determine whether there is available actual storage capacity in the memory to write the data; and write the data to a physical address in memory that corresponds to the logical address only if it is determined that there is available actual storage capacity in the memory to write the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: May 7, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amir Shaharabany, Michael Zaidman, Rotem Sela, Hadas Oshinsky
  • Publication number: 20190102114
    Abstract: Technology is disclosed that provides security for data stored in a non-volatile memory device. The non-volatile memory device may be embedded in a host system. The host system may further have a host controller that is configured to obtain a memory access message from an initiator to access the non-volatile memory. The host controller may be further configured to provide the memory access message to the memory controller. The memory access message may contain an identifier of the initiator, which may be verified by the host controller. The memory controller may be configured to access the identifier of the initiator from the memory access message, and grant or deny non-volatile memory access to the initiator based on whether the initiator has access rights to a region of the non-volatile memory to which the initiator seeks access.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 4, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Miki Sapir, Eliad Adi Klein
  • Publication number: 20190095271
    Abstract: A storage device with a memory may have a hidden diagnostic partition that can only be accessed during debug or diagnostic mode. Debug or diagnostic mode allows a host device to access the debug or diagnostic analysis (e.g. error logs) stored in the hidden diagnostic partition. By default, the hidden diagnostic partition is invisible to the host. When accessed through a triggering event, such as a vendor specific command (“VSC”), the hidden diagnostic partition can be used to report debug and error events.
    Type: Application
    Filed: September 27, 2017
    Publication date: March 28, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: Alexander Lemberg, Rotem Sela
  • Publication number: 20190050602
    Abstract: Technology that provides security for a requestor of data stored in a non-volatile memory device is disclosed. In one aspect, the non-volatile memory device provides data on a host interface only if a digest for the data matches an expected digest for the data. The non-volatile memory device may store expected digests for data for various logical addresses. Upon receiving a request on the host interface to read data for a logical address, the non-volatile memory device may access the data for the logical address, compute a digest for the accessed data, and compare the computed digest with the expected digest. The non-volatile memory device provides the accessed data on the host interface only if the computed digest matches the expected digest, in one aspect. The non-volatile memory device may be used to provide a secure boot of a host.
    Type: Application
    Filed: August 14, 2017
    Publication date: February 14, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Enosh Levi
  • Publication number: 20190004700
    Abstract: A controller addresses portions of non-volatile memory via a memory interface using physical addresses and addresses portions of host data via the host interface using logical addresses. The controller maintains logical to physical mappings and physical to logical mappings for the logical addresses and the physical addresses. The controller is configured to move data from a source logical address to a destination logical address by updating logical to physical mappings and physical address to logical mappings without instructing the non-volatile memory to move the data between physical locations. In one embodiment, this process is used to implement a command to move or defragment data.
    Type: Application
    Filed: June 28, 2017
    Publication date: January 3, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: Hadas Oshinsky, Rotem Sela, Amir Shaharabany
  • Publication number: 20190004907
    Abstract: A controller receives an indication that a memory management table loaded to a random-access storage device is in a corrupted state. The controller retrieves one or more error recovery parameters of a memory unit stored in metadata of a physical block of a plurality of physical blocks of the non-volatile storage device. The controller examines the one or more error recovery parameters to determine whether the one or more error recovery parameters indicate the memory unit is fresh or stale. The controller updates the memory management table with logical-to-physical translation information of the metadata for the memory unit that is determined to be fresh. The controller writes the updated memory management table to the non-volatile storage device.
    Type: Application
    Filed: August 24, 2017
    Publication date: January 3, 2019
    Inventors: Rotem SELA, Amir SHAHARABANY, Miki SAPIR, Eliad Adi KLEIN
  • Publication number: 20180322051
    Abstract: A storage system and method are provided for flush optimization. In one embodiment, a storage system is provided comprising a cache, a non-volatile memory, and a controller. The controller is configured to: store, in the cache, data received from a host and to be written in the non-volatile memory; receive a command from the host to move the data stored in the cache into the non-volatile memory; without having executed the command, send a confirmation to the host that the command was executed; and execute the command after sending the continuation to the host.
    Type: Application
    Filed: June 1, 2017
    Publication date: November 8, 2018
    Applicant: Western Digital Technologies, Inc.
    Inventors: Tal Heller, Hadas Oshinsky, Rotem Sela, Einav Zilberstein, Amir Shaharabany, Yigal Eli
  • Patent number: 10078614
    Abstract: Data transfer between a data storage device and a peripheral device bypasses an application processor that is coupled to the data storage device and to the peripheral device. In one embodiment, the data storage device includes a memory controller configured to receive, from an application processor, a message indicating a set of logical addresses and a data transfer identifier corresponding to the set of logical addresses. The memory controller is responsive to a request for memory access that includes the data transfer identifier and that is received from a peripheral device. The memory controller is configured to respond to the request by performing a memory access operation based on the set of logical addresses.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: September 18, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Eliad Adi Klein, Rotem Sela, Miki Sapir