Abstract: One or more embodiments relate to a semiconductor chip including a capacitor arrangement, the capacitor arrangement comprising: a first capacitor; and a second capacitor stacked above the first capacitor, the first capacitor and the second capacitor coupled in series between a first metallization level and a second metallization level adjacent the first metallization level.

Abstract: A semiconductor module comprises components in one wafer level package. The module comprises an integrated circuit (IC) chip embedded within a package molding compound. The package comprises a molding compound package layer coupled to an interface layer for integrating an antenna structure and a bonding interconnect structure to the IC chip. The bonding interconnect structure comprises three dimensional interconnects. The antenna structure and bonding interconnect structure are coupled to the IC chip and integrated within the interface layer in the same wafer fabrication process.

Abstract: One embodiment relates to a method for determining a concentration of a molecular species of interest. In this method, electromagnetic radiation is transmitted into a volume of gas within an output exhaust system. The transmitted electromagnetic radiation has a first intensity at a characteristic frequency that is associated with a transition of the molecular species of interest. Electromagnetic radiation is then received from the volume of gas at a second intensity. The method then correlates the first intensity to the second intensity to determine the concentration of the molecular species of interest within the volume of gas. Other methods and systems are also disclosed.

Abstract: An RF sender/receiver front-end is disclosed comprising a terminal for receiving an oscillator signal, at least one distribution unit for distributing the oscillator signal into different signal paths, two or more mixer-arrangements for sending a transmit-signal or for receiving an receive-signal, where each mixer-arrangement comprises a mixer and an amplifier for amplifying the oscillator signal and generating the transmit-signal.

Abstract: An RF sender/receiver front-end is disclosed comprising a terminal for receiving an oscillator signal, at least one distribution unit for distributing the oscillator signal into different signal paths, two or more mixer-arrangements for sending a transmit-signal or for receiving an receive-signal, where each mixer-arrangement comprises a mixer and an amplifier for amplifying the oscillator signal and generating the transmit-signal.

Abstract: A burner arrangement is disclosed with a conical swirler in the form of a double cone which is arranged concentric to a burner axis and which encloses a swirl chamber, and with a central fuel lance which lies in the burner axis and projects from the cone point of the swirler into the swirl chamber, wherein a first stage is provided for injecting premix fuel, in which the premix fuel is injected radially outwards into the swirl chamber through injection openings which are arranged on the fuel lance, and wherein a second stage is provided for injecting premix fuel, in which the premix fuel is injected into an air flow, which is guided in the double cone, through injection openings in the double cone. With such a burner arrangement, the gas pressure which is required in the first stage is reduced by the entire premix fuel being injected into the swirl chamber in the first stage through two oppositely-disposed injection openings with increased opening diameter.

Abstract: An RF sender/receiver front-end is disclosed comprising a terminal for receiving an oscillator signal, at least one distribution unit for distributing the oscillator signal into different signal paths, two or more mixer-arrangements for sending a transmit-signal or for receiving an receive-signal, where each mixer-arrangement comprises a mixer and an amplifier for amplifying the oscillator signal and generating the transmit-signal.

Abstract: An RF front-end includes an input configured to receive an oscillator signal, and an antenna port configured to transmit a transmission signal and receive a reception signal from an antenna. The RF front-end further includes a mixer having an RF-input configured to receive the reception signal, an oscillator input configured to receive a modified oscillator signal, and an output. The mixer is configured to mix the received signal into an intermediate frequency band or a base band using the oscillator signal. Also included is a directional coupler connected to the antenna port, the input for the oscillator signal, and the mixer. The coupler is configured to couple the oscillator signal as a transmission signal to the antenna via the antenna port, and couple the reception signal from the antenna to the RF-input of the mixer. Also included is a first phase shifter or a second phase shifter.

Abstract: Electronic apparatus having an antenna chip with a substrate and an antenna structure, and a method of producing the same. The antenna chip is integrated or packaged in a package having a clip mounting surface for mounting the antenna chip, and an encapsulating material. The encapsulating material typically is a plastic mold used in the industrial packaging of integrated circuits. Between the antenna structure and the chip mounting surface, a first void is disposed in the substrate.

Abstract: A method for fabricating a semiconductor including defining a first component region and a second component region in a semiconductor body is provided. A first epitaxial layer is formed through the first component region. A second epitaxial layer is formed over the first epitaxial layer, including configuring the physical dimensions of a first active zone of the first component region independent of a second active zone of the second component region via the first epitaxial layer and the second epitaxial layer. In one embodiment, the first component is a radio-frequency transistor and the second component is a varactor.

Abstract: The invention relates to a method for fabricating a transistor structure, comprising at least a first and a second bipolar transistor having different collector widths. The invention is distinguished by the fact that all junctions between differently doped regions have a sharp interface. In this case, by way of example, a first collector region 2.1 is suitable for a high-frequency transistor with high limiting frequencies fT and a second collector region 2.2 is suitable for a high-voltage transistor with increased breakdown voltages.

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

Abstract: A method for fabricating a semiconductor including defining a first component region and a second component region in a semiconductor body is provided. A first epitaxial layer is formed through the first component region. A second epitaxial layer is formed over the first epitaxial layer, including configuring the physical dimensions of a first active zone of the first component region independent of a second active zone of the second component region via the first epitaxial layer and the second epitaxial layer. In one embodiment, the first component is a radio-frequency transistor and the second component is a varactor.

Abstract: A method for operating a gas turbine plant utilizing sequential combustion is provided. The gas turbine plant includes a compressor for compressing inducted combustion air, a first combustion chamber for combustion of a first fuel by utilizing the compressed combustion air, with a first turbine which is connected downstream of the first combustion chamber, and a second combustion chamber for combustion of a second fuel by utilizing the gases which emerge from the first turbine, with a second turbine which is connected downstream of the second combustion chamber. The method provides quick running up with simultaneously low emissions and homogeneous distribution of the turbine inlet temperature is achieved by the second combustion chamber being completely shut down for achieving a low partial load mode of the gas turbine plant.

Abstract: A bipolar transistor has a base, an emitter and an emitter contact. The emitter has a monocrystalline layer and a polycrystalline layer, which are disposed between the base and the emitter contact in the mentioned order.

Abstract: A method for producing a bipolar transistor is described, which comprises providing a layer sequence, which comprises a substrate, a first oxide layer and a SOI layer, generating a collector region in the substrate, generating a second oxide layer on the layer sequence, generating a base region in the first oxide layer, such that the base region is in contact with the SOI layer, generating an emitter region on the base region such that the emitter region is isolated from the SOI layer, and generating a collector contact, a base contact and an emitter contact. The present invention is based on the knowledge that the production of a bipolar transistor can be made significantly less expensive when the above layer sequence is used for its production, and thereby, the base region is generated in the BOX layer while the collector region is formed in the substrate. Thereby, otherwise required production process steps and particularly layer deposition steps, such as for a polysilicon or oxide layer, are saved.

Abstract: A fabrication method produces an integrated component on a semiconductor substrate and having a plurality of electrode connections formed to project from to the main surface of the substrate. The electrode connections are simultaneously formed by removing the electrode connection layer and/or the insulation covering layer in regions adjoining the electrode connections. Furthermore, electrical connections are produced between individual circuit elements formed on or in a semiconductor substrate, interconnect channels being made in the planarized area with circuit elements and filling material. The interconnect channels are filled with a readily conductive material. The semiconductor component has a plurality of electrode connections that project from the substrate.

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

Abstract: A thin lower electrode layer having an optimally protected capacitor dielectric is produced and structured. A conventional metallization layer for strip conductors is placed thereon as an upper electrode and structured. The capacitor dielectric can be deposited on a very even, preferably metallic surface (e.g. preferably TiN), sealed by a thin, preferably metallic layer (e.g. TiN) and protected so that is does not become thinned or damaged by other process steps.

Abstract: A method for producing a bipolar transistor is described, which comprises providing a layer sequence, which comprises a substrate, a first oxide layer and a SOI layer, generating a collector region in the substrate, generating a second oxide layer on the layer sequence, generating a base region in the first oxide layer, such that the base region is in contact with the SOI layer, generating an emitter region on the base region such that the emitter region is isolated from the SOI layer, and generating a collector contact, a base contact and an emitter contact. The present invention is based on the knowledge that the production of a bipolar transistor can be made significantly less expensive when the above layer sequence is used for its production, and thereby, the base region is generated in the BOX layer while the collector region is formed in the substrate. Thereby, otherwise required production process steps and particularly layer deposition steps, such as for a polysilicon or oxide layer, are saved.