Abstract: A capacitor stack in a layer structure of an integrated component has the same layer sequence as an adjacent interconnect, with the exception of a dielectric interlayer. This significantly facilitates the fabrication of vias.

Abstract: A silicon-germanium bipolar transistor includes a silicon substrate in which a first n-doped emitter region, a second p-doped base region adjoining the latter and a third n-doped collector region adjoining the latter, are formed. A first space charge zone is formed between the emitter region and the base region and a second space charge zone is formed between the base region and the collector region. The base region and an edge zone of the adjoining emitter region are alloyed with germanium. The germanium concentration in the emitter region rises toward the base region. The germanium concentration in a junction region containing the first space charge zone rises less sharply than in the emitter region or decreases and, in the base region, it initially again rises more sharply than in the junction region.

Abstract: A method for forming a dielectric zone in a region of a semiconductor substrate is described. A first trench and a second trench are formed in the region of the semiconductor substrate resulting in a web being formed between the first trench and the second trench. Afterward, a first dielectric layer is deposited in the first trench and the second trench. The web is subsequently removed, a third trench thereby being produced in the semiconductor substrate. Afterwards, a second dielectric layer is formed in the third trench. The first dielectric layer and the second dielectric layer together form a dielectric zone in the semiconductor substrate, on which it is advantageously possible to dispose components with substrate decoupling.

Abstract: A capacitor stack (12) in a layer structure of an integrated component has the same layer sequence as an adjacent interconnect (13), with the exception of a dielectric interlayer (5). This significantly facilitates the fabrication of vias (16).

Abstract: A thin lower electrode layer having an optimally protected capacitor dielectric is produced and structured. A conventional metallization layer for strip conductors is placed thereon as an upper electrode and structured. The capacitor dielectric can be deposited on a very even, preferably metallic surface (e.g. preferably TiN), sealed by a thin, preferably metallic layer (e.g. TiN) and protected so that is does not become thinned or damaged by other process steps.

Abstract: A silicon-germanium bipolar transistor includes a silicon substrate in which a first n-doped emitter region, a second p-doped base region adjoining the latter and a third n-doped collector region adjoining the latter, are formed. A first space charge zone is formed between the emitter region and the base region and a second space charge zone is formed between the base region and the collector region. The base region and an edge zone of the adjoining emitter region are alloyed with germanium. The germanium concentration in the emitter region rises toward the base region. The germanium concentration in a junction region containing the first space charge zone rises less sharply than in the emitter region or decreases and, in the base region, it initially again rises more sharply than in the junction region.

Abstract: A method for forming a dielectric zone in a region of a semiconductor substrate is described. A first trench and a second trench are formed in the region of the semiconductor substrate resulting in a web being formed between the first trench and the second trench. Afterward, a first dielectric layer is deposited in the first trench and the second trench. The web is subsequently removed, a third trench thereby being produced in the semiconductor substrate. Afterwards, a second dielectric layer is formed in the third trench. The first dielectric layer and the second dielectric layer together form a dielectric zone in the semiconductor substrate, on which it is advantageously possible to dispose components with substrate decoupling.