Patents by Inventor Ruizhi Shi

Ruizhi Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9817197
    Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: November 14, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: David Henry Kinghorn, Ari Jason Novack, Holger N. Klein, Nathan A. Nuttall, Kishor V. Desai, Daniel J. Blumenthal, Michael J. Hochberg, Ruizhi Shi
  • Publication number: 20170322373
    Abstract: A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a photonic integrated circuit may be constructed with light shields integrally built in.
    Type: Application
    Filed: July 26, 2017
    Publication date: November 9, 2017
    Inventors: Ruizhi Shi, Yang Liu, Ari Novack, Yangjin Ma, Kishore Padmaraju, Michael J. Hochberg
  • Patent number: 9810840
    Abstract: A low loss high extinction ratio on-chip polarizer is disclosed. The polarizer includes an input waveguide taper having an outer waveguiding region that widens in the direction of light propagation along at least a portion of the taper length, and a core waveguiding region that narrows in the direction of light propagation along at least a portion of the taper length, so as to selectively squeeze out light of undesired modes into the outer regions while preserving light of a desired mode in the waveguide core. An integrated light absorber/deflector may be coupled to the outer waveguiding regions.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: November 7, 2017
    Assignee: Elenion Technologies LLC
    Inventors: Ruizhi Shi, Thomas Wetteland Baehr-Jones, Yangjin Ma, Yang Liu, Michael J. Hochberg, Matthew Akio Streshinsky
  • Patent number: 9766408
    Abstract: A composite optical waveguide is constructed using an array of waveguide cores, in which one core is tapered to a larger dimension, so that all the cores are used as a composite input port, and the one larger core is used as an output port. In addition, transverse couplers can be fabricated in a similar fashion. The waveguide cores are preferably made of SiN. In some cases, a layer of SiN which is provided as an etch stop is used as at least one of the waveguide cores. The waveguide cores can be spaced away from a semiconductor layer so as to minimize loses.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: September 19, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: Ari Novack, Ruizhi Shi, Michael J. Hochberg, Thomas Baehr-Jones
  • Patent number: 9746609
    Abstract: A low loss high extinction ratio on-chip polarizer is disclosed. The polarizer is formed of a mode convertor followed by a mode squeezer and a dump waveguide, and may be configured to pass a desired waveguide mode and reject undesired modes. An embodiment is described that transmits a TE0 mode while blocking a TM0 mode by converting the TM0 mode into a higher-order TEn mode in a waveguide taper, squeezing out the TEn mode in a second waveguide taper to lessen its confinement, and then dumping the TEn mode in a waveguide bend that is configured to pass the TE0 mode.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: August 29, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: Yangjin Ma, Michael J. Hochberg, Ruizhi Shi, Yang Liu
  • Patent number: 9739938
    Abstract: A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a photonic integrated circuit may be constructed with light shields integrally built in.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: August 22, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: Ruizhi Shi, Yang Liu, Ari Novack, Yangjin Ma, Kishore Padmaraju, Michael J. Hochberg
  • Publication number: 20170235046
    Abstract: A compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguides. The design was performed using FDTD and particle swarm optimization (PSO). The device was fabricated in a 248 nm CMOS line. Measured average insertion loss is 0.28±0.02 dB across an 8-inch wafer. The device footprint is less than 1.2 ?m×2?m, orders of magnitude smaller than MMI and directional couplers.
    Type: Application
    Filed: March 1, 2017
    Publication date: August 17, 2017
    Inventors: Yang Liu, Yangjin Ma, Ruizhi Shi, Michael J. Hochberg, Yi Zhang, Shuyu Yang, Thomas Wetteland Baehr-Jones
  • Publication number: 20170192171
    Abstract: A low loss high extinction ratio on-chip polarizer is disclosed. The polarizer includes an input waveguide taper having an outer waveguiding region that widens in the direction of light propagation along at least a portion of the taper length, and a core waveguiding region that narrows in the direction of light propagation along at least a portion of the taper length, so as to selectively squeeze out light of undesired modes into the outer regions while preserving light of a desired mode in the waveguide core. An integrated light absorber/deflector may be coupled to the outer waveguiding regions.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 6, 2017
    Inventors: Ruizhi Shi, Thomas Wetteland Baehr-Jones, Yangjin Ma, Yang Liu, Michael J. Hochberg, Matthew Akio Streshinsky
  • Publication number: 20170168234
    Abstract: A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a photonic integrated circuit may be constructed with light shields integrally built in.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Ruizhi Shi, Yang Liu, Ari Novack, Yangjin Ma, Kishore Padmaraju, Michael J. Hochberg
  • Publication number: 20170139146
    Abstract: A composite optical waveguide is constructed using an array of waveguide cores, in which one core is tapered to a larger dimension, so that all the cores are used as a composite input port, and the one larger core is used as an output port. In addition, transverse couplers can be fabricated in a similar fashion. The waveguide cores are preferably made of SiN. In some cases, a layer of SiN which is provided as an etch stop is used as at least one of the waveguide cores. The waveguide cores can be spaced away from a semiconductor layer so as to minimize loses.
    Type: Application
    Filed: January 27, 2017
    Publication date: May 18, 2017
    Inventors: Ari Novack, Ruizhi Shi, Michael J. Hochberg, Thomas Baehr-Jones
  • Publication number: 20170092785
    Abstract: A temperature-controlled photodetector sub-system is described. The temperature control element allows the operation of the photodetector at a desired temperature. The temperature control element can be a heater or a cooler. In some cases, the photodetector is a germanium photodetector. In some cases a temperature measuring device is provided. In some cases, a control circuit is used to control the temperature of the germanium photodetector within a temperature range, or at a temperature of interest. An advantage provided by the apparatus described is the operation of the photodetector so that the responsivity of the germanium detector can be held at essentially a constant value.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Applicant: Coriant Advanced Technology, LLC
    Inventors: Ari Novack, Ruizhi Shi, Jean Claude Labarrie
  • Patent number: 9588298
    Abstract: A composite optical waveguide is constructed using an array of waveguide cores, in which one core is tapered to a larger dimension, so that all the cores are used as a composite input port, and the one larger core is used as an output port. In addition, transverse couplers can be fabricated in a similar fashion. The waveguide cores are preferably made of SiN. In some cases, a layer of SiN which is provided as an etch stop is used as at least one of the waveguide cores. The waveguide cores can be spaced away from a semiconductor layer so as to minimize loses.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: March 7, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: Ari Novack, Ruizhi Shi, Michael J. Hochberg, Thomas Baehr-Jones
  • Publication number: 20170003451
    Abstract: A low loss high extinction ratio on-chip polarizer is disclosed. The polarizer is formed of a mode convertor followed by a mode squeezer and a dump waveguide, and may be configured to pass a desired waveguide mode and reject undesired modes. An embodiment is described that transmits a TE0 mode while blocking a TM0 mode by converting it into a higher-order TEn mode in a waveguide taper, squeezing out the TEn mode in a second waveguide taper to lessen its confinement, and then dumping the TEn mode in a waveguide bend that is configured to pass the TE0 mode.
    Type: Application
    Filed: November 18, 2015
    Publication date: January 5, 2017
    Inventors: Yangjin Ma, Michael J. Hochberg, Ruizhi Shi, Yang Liu
  • Publication number: 20160356958
    Abstract: An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 8, 2016
    Inventors: Ruizhi Shi, Michael J. Hochberg, Ari Jason Novack, Thomas Wetteland Baehr-Jones
  • Publication number: 20160356960
    Abstract: A composite optical waveguide is constructed using an array of waveguide cores, in which one core is tapered to a larger dimension, so that all the cores are used as a composite input port, and the one larger core is used as an output port. In addition, transverse couplers can be fabricated in a similar fashion. The waveguide cores are preferably made of SiN. In some cases, a layer of SiN which is provided as an etch stop is used as at least one of the waveguide cores. The waveguide cores can be spaced away from a semiconductor layer so as to minimize loses.
    Type: Application
    Filed: July 14, 2015
    Publication date: December 8, 2016
    Inventors: Ari Novack, Ruizhi Shi, Michael J. Hochberg, Thomas Baehr-Jones
  • Patent number: 9470844
    Abstract: A low loss high extinction ratio on-chip polarizer has at bi-layer optical taper with an input port of width W1 that communicates with a mode squeezer, followed by an S-bend (or dump bend), and finally a taper having an output port of width W1. The illumination that passes through the low loss high extinction ratio on-chip polarizer has a TM0 mode converted to a TE1 mode which is lost in the mode squeezer and S-bend section, while an input TE0 mode is delivered at the output as a substantially pure TE0 signal of nearly undiminished intensity.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 18, 2016
    Assignee: Coriant Advanced Technology, LLC
    Inventors: Yangjin Ma, Ruizhi Shi, Yang Liu
  • Publication number: 20160291265
    Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 6, 2016
    Inventors: David Henry Kinghorn, Ari Jason Novack, Holger N. Klein, Nathan A. Nuttall, Kishor V. Desai, Daniel J. Blumenthal, Michael J. Hochberg, Ruizhi Shi
  • Publication number: 20160033765
    Abstract: A compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguides. The design was performed using FDTD and particle swarm optimization (PSO). The device was fabricated in a 248 nm CMOS line. Measured average insertion loss is 0.28±0.02 dB across an 8-inch wafer. The device footprint is less than 1.2 ?m×2 ?m, orders of magnitude smaller than MMI and directional couplers.
    Type: Application
    Filed: August 25, 2015
    Publication date: February 4, 2016
    Inventors: Yang Liu, Yangjin Ma, Ruizhi Shi, Michael J. Hochberg, Yi Zhang, Shuyu Yang, Thomas Wetteland Baehr-Jones
  • Publication number: 20160012176
    Abstract: A compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguides. The design was performed using FDTD and particle swarm optimization (PSO). The device was fabricated in a 248 nm CMOS line. Measured average insertion loss is 0.28±0.02 dB across an 8-inch wafer. The device footprint is less than 1.2 ?m×2 ?m, orders of magnitude smaller than MMI and directional couplers.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Inventors: Yang Liu, Michael J. Hochberg, Yi Zhang, Yangjin Ma, Ruizhi Shi