Abstract: An apparatus and a method for adding capacitance while conserving circuit board surface area. An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.

Abstract: Provided circuit modules employ flexible circuitry populated with integrated circuitry (ICs). The flex circuitry is disposed about a rigid substrate. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. A strain relief portion of the flex circuitry has preferably fewer layers than the portion of the flex circuitry along which the integrated circuitry is disposed and may further may exhibit more flexibility than the portion of the flex circuit populated with integrated circuitry. The substrate form is preferably devised from thermally conductive materials.

Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).

Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).

Abstract: An apparatus and a method for adding capacitance while conserving circuit board surface area. An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.

Abstract: The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance. In a preferred embodiment of the memory addressing system, a high speed switching system selects a data line associated with each level of a stacked module to reduce the loading effect upon data signals in memory access.

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.

Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leaded packages into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP and a support element CSP are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements.

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard is disposed between the flex circuitry and the IC package over which a portion of the flex circuitry is laid. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance.

Abstract: A circuit module is provided in which two secondary substrates or cards or the rigid portions of a rigid flex assembly are populated with integrated circuits (ICs). The secondary substrates are connected with flexible circuitry. One side of the flexible circuitry exhibits contacts adapted for connection to an edge connector. The flexible circuitry is wrapped about an edge of a preferably metallic substrate to dispose one of the two secondary substrates on a first side of the substrate and the other of the secondary substrates on the second side of the substrate.

Abstract: A circuit module is provided in which two secondary substrates or cards or the rigid portions of a rigid flex assembly are populated with integrated circuits (ICs). The secondary substrates are connected with flexible circuitry. One side of the flexible circuitry exhibits contacts adapted for connection to an edge connector. The flexible circuitry is wrapped about an edge of a preferably metallic substrate to dispose one of the two secondary substrates on a first side of the substrate and the other of the secondary substrates on the second side of the substrate.

Abstract: An apparatus and a method for adding capacitance while conserving circuit board surface area. An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.

Abstract: A circuit module is provided in which two secondary substrates or cards or the rigid portions of a rigid flex assembly are populated with integrated circuits (ICs). The secondary substrates are connected with flexible circuitry. One side of the flexible circuitry exhibits contacts adapted for connection to an edge connector. The flexible circuitry is wrapped about an edge of a preferably metallic substrate to dispose one of the two secondary substrates on a first side of the substrate and the other of the secondary substrates on the second side of the substrate.

Abstract: Provided circuit modules employ flexible circuitry populated with integrated circuitry (ICs). The flex circuitry is disposed about a rigid substrate. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. A strain relief portion of the flex circuitry has preferably fewer layers than the portion of the flex circuitry along which the integrated circuitry is disposed and may further may exhibit more flexibility than the portion of the flex circuit populated with integrated circuitry. The substrate form is preferably devised from thermally conductive materials.

Abstract: One or more capacitors are mounted within the lateral extent of a module having one or more integrated circuits. Other components may be similarly mounted. In one embodiment, multiple ICs are stacked and interconnected with flexible circuits to form a high-density module. Surface-mount capacitors may be mounted to the flexible circuits. In other embodiments, capacitors are placed at least partially within cutout spaces formed in the flexible circuits. Preferred embodiments have flex circuits with two conducive layers. Module contacts may be used to connect the module to its operating environment.

Abstract: Abstract of the Disclosure Integrated circuits (ICs) are stacked into modules that conserve PCB or other board surface area. The modules provide for lower capacitance memory signaling systems and methods for connecting stacked CSPs in a serial cascade arrangement. In one preferred embodiment, on-die terminations are used selectively to terminate a cascaded series of conductive paths. In another preferred embodiment, a form standard provides a physical form that allows many of the varying package sizes found in a broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.

Abstract: A termination circuit changes impedance to match a transmission line impedance. The change is made after a signal driver applies a signal through the termination circuit to the transmission line but before a signal reflection returns from an end of the transmission line.

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard is disposed between the flex circuitry and the IC package over which a portion of the flex circuitry is laid. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance. In a preferred embodiment, a high speed switching system selects a data line associated with each level of a stacked module to reduce the loading effect upon data signals in memory access. This favorably changes the impedance characteristics exhibited by a DIMM board populated with stacked modules.

Abstract: A termination circuit changes impedance to match a transmission line impedance. The change is made after a signal driver applies a signal through the termination circuit to the transmission line but before a signal reflection returns from an end of the transmission line.